Datasheet

LTC3676/LTC3676-1
23
3676fa
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OPERATION
PGSTAT and MSKPG Registers
The power good status of each regulator is accessible
through the LTC3676 I
2
C interface by reading the contents
of the PGSTAT status register. Table 13 shows the PGSTAT
register contents. The data in the PGSTATL register is held
for the length of the low voltage condition plus 1ms. The
data in the PGSTATRT register is held only for the duration
of the low voltage condition.
Table 13. Power Good Status Register
STATUS
REGISTER[BIT] VALUE REGULATOR OUTPUT LOW STATUS
PGSTAT[0] 0
1
Buck1 Output Low
Buck1 Output OK
PGSTA
T[1] 0
1
Buck2 Output Low
Buck2 Output OK
PGSTA
T[2] 0
1
Buck3 Output Low
Buck3 Output OK
PGSTA
T[3] 0
1
Buck4 Output Low
Buck4 Output OK
PGSTA
T[4] 0
1
LDO1 Output Low
LDO1 Output OK
PGSTA
T[5] 0
1
LDO2 Output Low
LDO2 Output OK
PGSTA
T[6] 0
1
LDO3 Output Low
LDO3 Output OK
PGSTA
T[7] 0
1
LDO4 Output Low
LDO4 Output OK
Each regulator has a corresponding bit in the MSKPG status
register as shown in Table 14. When set, a bit blocks the
PGOOD pin from being pulled low in the event of a low
output voltage fault from its matching regulator. Setting
a bit in the MSKPG command register does not mask the
status in the PGSTAT status register.
Table 14. Power Good Status Masking Command Register
COMMAND
REGISTER[BIT] VALUE
MSKPG [0] 0
1*
Mask Buck1 PGOOD Status
Pass Buck1 PGOOD Status
MSKPG [1] 0
1*
Mask Buck2 PGOOD Status
Pass Buck2 PGOOD Status
MSKPG [2] 0
1*
Mask Buck3 PGOOD Status
Pass Buck3 PGOOD Status
MSKPG [3] 0
1*
Mask Buck4 PGOOD Status
Pass Buck4 PGOOD Status
MSKPG [5] 0
1*
Mask LDO2 PGOOD Status
Pass LDO2 PGOOD Status
MSKPG [6] 0
1*
Mask LDO3 PGOOD Status
Pass LDO3 PGOOD Status
MSKPG [7] 0
1*
Mask LDO4 PGOOD Status
Pass LDO4 PGOOD Status
*denotes default power-on value.
IRQ Status Pin
The IRQ pin is pulled and latched low when undervoltage,
overtemperature or persistent PGOOD events occur. The
IRQ pin is cleared by addressing the CLIRQ command
register or by holding ON low for 50ms.
Table 15. Interrupt Request Status Register
STATUS
REGISTER[BIT] VALUE IRQSTAT REGISTER BIT MEANING
IRQSTAT [0] 0
1 Pushbutton Status Active (Real Time)
IRQSTA
T [1] 0
1 Hard Reset Occurred
IRQSTA
T [2] 0
1 PGOOD Timeout Occurred
IRQSTA
T [3] 0
1 Undervoltage Warning
IRQSTA
T [4] 0
1 Undervoltage Standby Occurred
IRQSTA
T [5] 0
1 Overtemperature Warning
IRQSTA
T [6] 0
1 Overtemperature Standby Occurred