Datasheet
LTC3676/LTC3676-1
17
3676fa
For more information www.linear.com/LTC3676
Figure 4. Phase Settings Full- and Half-Speed Buck Clock
OPERATION
time plus internal delays of the peak current sense and
PWM control. If the converters duty cycle will be 20% or
less at 2.25MHz it is recommended to use the 1.125MHz
setting to avoid minimum duty cycle. If the duty cycle falls
below the minimum on-time of the converter, the output
voltage ripple will increase as the converter skips cycles.
The default setting for the LTC3676-1 Buck1 switching
frequency is 1.125MHz to ensure minimum on time ef
-
fects are
avoided at DDR termination reference voltages.
Phase Selection
To
reduce the cycle by cycle peak current drawn by the
switching regulators, the clock phase at which each of the
LTC3676 buck’s PMOS switch turns on can be set using
I
2
C command register settings.
Table 4. Buck1 Control Command Register
COMMAND
REGISTER[BIT] VALUE SETTING
BUCK1[0] 0*
1
Switch Slew Rate Normal
Switch Slew Rate Fast
BUCK1[1] 0*
1
Do Not Keep Enabled in Device Standby
Keep Enabled in Device Standby
BUCK1[2]
(LTC3676)
0*
1
Switching Frequency 2.25MHz
Switching Frequency 1.125MHz
BUCK1[2]
(LTC3676-1)
0*
1
Switching Frequency 1.125MHz
Switching Frequency 2.25MHz
BUCK1[3] 0*
1
Clock Phase 1
Clock Phase 2
BUCK1[4] 0*
1
Enable at Any Output V
oltage
Enable Only if Output Voltage Is <300mV
BUCK1[6:5] 00*
01
10
Pulse-Skipping Mode
Burst Mode Operation
For
ced Continuous Mode
BUCK1[7] 0*
1
Buck1 Disabled if EN_B1 Pin Is Low
Buck1 Enabled
*denotes default power on-value.
Table 5. Buck2 Control Command Register
COMMAND
REGISTER[BIT] VALUE SETTING
BUCK2[0] 0*
1
Switch Slew Rate Normal
Switch Slew Rate Fast
BUCK2[1] 0*
1
Do Not Keep Enabled in Device Standby
Keep Enabled in Device Standby
BUCK2[2] 0*
1
Switching Frequency 2.25MHz
Switching Frequency 1.125MHz
BUCK2[3] 0*
1
Clock Phase 1
Clock Phase 2
BUCK2[4] 0*
1
Enable at Any Output V
oltage
Enable Only if Output Voltage Is <300mV
BUCK2[6:5] 00*
01
10
Pulse-Skipping Mode
Burst Mode Operation
For
ced Continuous Mode
BUCK2[7] 0*
1
Buck2 Disabled if EN_B2 Pin Is Low
Buck2 Enabled
*denotes default power-on value.
2.25MHz
φ1 φ2 φ1
1.125MHz
3676 F04
φ1 φ2
Switch Slew Rate Control
To help reduce EMI the switch rise time of each buck regula-
tor is
slew limited by default. A faster setting is selectable
using
the I
2
C buck command registers. The faster setting
will improve efficiency if limited edge rate is not required.
Soft-Start
To reduce inrush current at start-up each buck regulator
soft starts when enabled. When enabled the internal ref
-
erence voltage is ramped from ground to the level of the
slewing
DAC output at a rate of 0.8V/ms. During soft-start
the converter is forced to pulse-skipping mode regardless
of command register mode settings.