Datasheet

LTC3646/LTC3646-1
19
36461fa
For more information www.linear.com/LTC3646
Thermal Considerations
The LTC3646 requires the exposed package backplane
metal (PGND) to be well soldered to the PC board to pro
-
vide good thermal contact. This gives the QFN and MSOP
packages exceptional thermal properties, compared to
other packages of similar size, making it difficult in normal
operation to exceed the maximum junction temperature
of the part. In many applications, the LTC3646 does not
generate much heat due to its high efficiency. However,
in applications in which the LTC3646 is running at a high
ambient temperature, high input voltage, high switching
frequency, and maximum output current, the heat dissi
-
pated may cause the part to exceed the maximum allowed
junction temperature. If the junction temperature reaches
approximately 175°C, both power switches will be turned
off until temperature decreases approximately 10°C.
Thermal analysis should always be performed by the user
to ensure the LTC3646 does not exceed the maximum
junction temperature.
The temperature rise is given by:
t
RISE
= P
D
θ
JA
where P
D
is the power dissipated by the regulator and
θ
JA
is the thermal resistance from the junction of the
die to the ambient. Consider the example in which an
LTC3646IDE-1 is operating with I
OUT
= 1.0A, SVIN = 12V,
f = 3MHz, V
OUT
= 1.8V, and a board temperature of 85°C.
From the Typical Performance Characteristics section, the
R
DS(ON)
of the top switch is found to be nominally 200
while that of the bottom switch is nominally 120
yielding an equivalent power MOSFET resistance R
SW
of:
R
DS(ON)TOP
1.8
12
+
R
DS(ON)BOT
10.2
12
= 132mΩ
From the previous section, I
GATECHG
+ I
Q
is ~15mA when
f = 3MHz. Therefore, the total power dissipation due to
resistive losses and LDO losses is:
P
D
= I
OUT
2
R
SW
+ SVIN • (I
GATECHG
+ I
Q
)
P
D
= (1.0)
2
• (0.132) + 12V • 15mA = 312mW
and the transition loss is:
P
T
= 1.0 • 12
2
• 10
–10
• 3.0 • 10
6
= 43mW
applicaTions inForMaTion
The DFN 4mm × 3mm package junction-to-ambient thermal
resistance,
θ
JA
, is approximately 43°C/W. Therefore, the
junction temperature of the regulator operating in a 85°C
ambient temperature is approximately:
T
J
= (0.312 + 0.043) • 43 + 85 = 100°C
which is below the specified maximum junction tempera-
ture of 125°C.
High
input voltage, high frequency applications may cause
the internal LDO to generate significant heat. The INTV
CC
current, which is dominated by the gate charge current,
may be supplied by either the SVIN LDO or through the
EXTV
CC
pin. When the voltage on the EXTV
CC
pin is less
than 4.5V, the V
IN
LDO is enabled. Power dissipation for the
IC in this case is highest and is equal to SVIN I
INTVCC
. The
gate charge current is dependent on operating frequency
as discussed in the Efficiency Considerations section. For
example, the LTC3646 INTV
CC
current is approximately
15mA at 3
MHz operation. If V
IN
is at the 40V maximum,
the loss in the on-chip LDO is:
40V • 0.015A = 0.60W
In these situations it will be advantageous to bias the
part through the EXTV
CC
pin if a suitable voltage source
is available. When the voltage applied to EXTV
CC
rises
above 4.5V (maximum 6.0V), the SVIN LDO is turned off
and an internal switch between the EXTV
CC
and INTV
CC
pins is closed. This voltage is unregulated and so in this
situation, INTV
CC
= EXTV
CC
.
Using EXTV
CC
allows the control power to be derived from
the output if the output voltage is between 4.5V and 6.0V
during normal operation and from the SVIN LDO when the
output is out of regulation (e.g., start-up, short-circuit).
Significant efficiency and thermal gains can be realized by
powering INTV
CC
from the output, since the power needed
for the driver and control currents will be supplied from
the buck converter instead of the internal linear regulator.
For 4.5V to 6V regulator outputs, this means connecting
the EXTV
CC
pin directly to V
OUT
. Tying the EXTV
CC
pin to a
5.5V supply reduces the dissipated power in the previous
example
from 0.60W to approximately:
5.5V • 0.015A = 82.5mW