Datasheet

LTC3642
16
3642fc
APPLICATIONS INFORMATION
The undervoltage lockout requirement on V
IN
can be
satisfied with a resistive divider from V
IN
to the RUN and
HYST pins. Choose R1 = 2M and calculate R2 and R3 as
follows:
R2 =
1.21V
V
IN(RISING)
– 1.21V








• R1= 224k
R3 =
1.1V
V
IN(FALLING)
– 1.1V








• R1– R2 = 90.8k
Choose standard values for R2 = 226k and R3 = 91k. The
I
SET
pin should be left open in this example to select maxi-
mum peak current (115mA). Figure 9 shows a complete
schematic for this design example.
3. Keep the switching node, SW, away from all sensitive
small signal nodes. The rapid transitions on the switching
node can couple to high impedance nodes, in particular
V
FB
, and create increased output ripple.
4. Flood all unused area on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. You can connect the copper areas to any
DC net (V
IN
, V
OUT
, GND or any other DC rail in your
system).
V
IN
LTC3642
RUN
2M
1µF
226k
91k
HYST
3642 F09
SW
V
IN
24V
V
OUT
3.3V
50mA
I
SET
SS
V
FB
GND
750k
10µF
100µH
240k
Figure 9. 24V to 3.3V, 50mA Regulator at 250kHz
Figure 10. Layout Example
V
IN
LTC3642
RUN
C
IN
C
SS
R
SET
I
SET
3642 F10a
SW
V
IN
V
OUT
V
FB
SS
HYST
GND
L1
R1
R2
1
6
2
5
7
4 3
8, 9
C
OUT
L1
C
OUT
V
OUT
V
IN
GND
3642 F10b
VIAS TO GROUND PLANE
VIAS TO INPUT SUPPLY (V
IN
)
OUTLINE OF LOCAL GROUND PLANE
C
IN
R1
R2
R
SET
C
SS
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3642. Check the following in your layout:
1. Large switched currents flow in the power switches
and input capacitor. The loop formed by these compo-
nents should be as small as possible. A ground plane
is recommended to minimize ground impedance.
2. Connect the (+) terminal of the input capacitor, C
IN
, as
close as possible to the V
IN
pin. This capacitor provides
the AC current into the internal power MOSFETs.