Datasheet

LTC3642
13
3642fc
APPLICATIONS INFORMATION
Output Voltage Programming
For the adjustable version, the output voltage is set by
an external resistive divider according to the following
equation:
V
OUT
= 0.8V • 1+
R1
R2






The resistive divider allows the V
FB
pin to sense a fraction
of the output voltage as shown in Figure 6. Output voltage
adjustment range is from 0.8V to V
IN
.
V
FB
LTC3642
GND
V
OUT
R2
R1
Figure 6. Setting the Output Voltage
To minimize the no-load supply current, resistor values in
the megohm range should be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leak-
age current to the output node or switch node exceeds
the load current, the output voltage will be pulled up. In
normal operation, this is generally a minor concern since
the load current is much greater than the leakage. The
increase in supply current due to the feedback resistors
can be calculated from:
∆I
VIN
=
V
OUT
R1+R2






•
V
OUT
V
IN






Run Pin with Programmable Hysteresis
The LTC3642 has a low power shutdown mode controlled
by the RUN pin. Pulling the RUN pin below 0.7V puts the
LTC3642 into a low quiescent current shutdown mode
(I
Q
~ 3µA). When the RUN pin is greater than 1.2V, the
LTC3642
RUN
4.7M
V
IN
3642 F07
LTC3642
RUN
V
SUPPLY
Figure 7. RUN Pin Interface to Logic
controller is enabled. Figure 7 shows examples of con-
figurations for driving the RUN pin from logic.
RUN
LTC3642
HYST
V
IN
R2
R1
R3
3642 F08
Figure 8. Adjustable Undervoltage Lockout
The RUN pin can alternatively be configured as a precise
undervoltage lockout (UVLO) on the V
IN
supply with a
resistive divider from V
IN
to ground. The RUN pin com-
parator nominally provides 10% hysteresis when used in
this method; however, additional hysteresis may be added
with the use of the HYST pin. The HYST pin is an open-
drain output that is pulled to ground whenever the RUN
comparator is not tripped. A simple resistive divider can
be used as shown in Figure 8 to meet specific V
IN
voltage
requirements.
Specific values for these UVLO thresholds can be computed
from the following equations:
RisingV
IN
UVLOThreshold = 1.21V • 1+
R1
R2






FallingV
IN
UVLOThreshold = 1.10V • 1+
R1
R2+R3





