Datasheet

LTC3625/LTC3625-1
3
3625f
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.6V, R
PROG
= 143k, unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
VIN
Input Operating Current,
I
SW1
= I
SW2
= 0µA, No Switching
CTL = V
IN
, V
MID
= 1.5V, V
OUT
= 2.5V (Boost Only)
CTL = V
IN
, V
MID
= 1.5V, V
OUT
= 3.5V (Buck Only)
CTL = 0, V
MID
= 1.5V, V
OUT
= 2.5V (Buck and Boost)
135
275
365
200
400
530
µA
µA
µA
Input Sleep Current V
IN
= 5.5V, V
OUT
= 5.4V
V
IN
= 3.6V, V
OUT
= 5.4V
23
8
35
15
µA
µA
Input SD Current V
OUT
= 0V 0 1 µA
I
VOUT
V
OUT
SD Current V
OUT
= 5.4V 0 1 µA
V
OUT
Sleep Current V
OUT
= 5.4V, V
IN
= 3.6V, EN = V
IN
V
OUT
= 5.4V, V
IN
= 5.5V, EN = V
IN
17
1
25
2.5
µA
µA
V
PROG
PROG Servo Voltage V
OUT
= 3.5V, V
MID
= 1.5V
l
1.17 1.2 1.23 V
h
PROG
Ratio of Measured I
PROG
Current to
I
BUCK
Programmed Current
118,000
I
BUCK
Programmed Buck Charge Current R
PROG
= 143k (Note 5)
R
PROG
= 71.5k (Note 5)
0.88
1.76
0.99
1.98
1.10
2.20
A
A
I
MAX
Maximum Programmed Charge
Current
R
PROG
= 0Ω (Fault Condition) (Note 5) 1.98 2.65 3.31 A
V
MID(GOOD)
V
MID
Voltage Where the Boost
Regulator is Enabled
1.35 V
V
MID(GOOD)
Hysteresis 150 mV
V
TRICKLE
V
OUT
Voltage Above Which Boost
Regulator Will Exit Trickle Charge
Mode and Enter Normal Charge
Mode
V
OUT
Rising V
MID
V
V
TRICKLE
Falling Hysteresis 50 mV
I
PEAK(BUCK)
Buck Charge Current Peak 1.1 • I
BUCK
A
I
VALLEY(BUCK)
Buck Charge Current Valley 0.9 • I
BUCK
A
I
PEAK(BOOST)
Boost Charge Current Peak V
OUT
= 3V, V
MID
= 2V (Note 5)
V
OUT
= 1V, V
MID
= 2V (Note 5)
1.59 2.12
200
2.65 A
mA
I
VALLEY(BOOST)
Boost Charge Current Valley V
OUT
= 3V, V
MID
= 2V
V
OUT
= 1V, V
MID
= 2V
1.41 1.88
0
2.35 A
mA
Maximum Boost Valley Time V
OUT
= 1V, V
MID
= 2V 6.5 µs
R
PMOS
PMOS On-Resistance 120 mΩ
R
NMOS
NMOS On-Resistance 100 mΩ
I
LEAK
SW Pin Leakage Current for SW1,
SW2
EN = 0V 1 µA
V
PFI
PFI Falling Threshold
l
1.17 1.2 1.23 V
PFI Hysteresis 15 mV
I
PFI
Pin Leakage Current for PFI Pin 0 30 nA
Logic (EN, CTL, V
SEL
, PGOOD, PFO)
V
IL
Input Low Logic Voltage EN, CTL, V
SEL
Pins
l
0.4 V
V
IH
Input High Logic Voltage EN, CTL, V
SEL
Pins
l
1.2 V
I
IL
, I
IH
Input Low, High Current for CTL CTL 1 µA
R
PD
EN Pin Pull-Down Resistance 4.5 MΩ
V
SEL
Pin Pull-Down Resistance EN = V
IN
4.5 MΩ
V
OL
Output Low Logic Voltage PGOOD, PFO Pins; Sinking 5mA
l
70 200 mV
I
OH
Logic High Leakage Current PGOOD, PFO Pins; Pin Voltage = 5V 1 µA
PGOOD Rising Threshold V
OUT
as a Percentage of Final Target 90 92.5 95 %
PGOOD Hysteresis
∆V
OUT
as a Percentage of Final Target
3 %