Datasheet

LTC3621/LTC3621-2
10
3621fb
For more information www.linear.com/LTC3621
applicaTions inForMaTion
the load transient response. The output ripple, ∆V
OUT
, is
determined by:
V
OUT
< I
L
1
8 • f • C
OUT
+ESR




∆ ∆
The output ripple is highest at maximum input voltage
since ∆I
L
increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements. Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V
IN
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at V
IN
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char
-
acteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. Typically, five cycles are required to
respond to a load step, but only in the first cycle does the
output voltage drop linearly. The output droop, V
DROOP
, is
usually about three times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
C
OUT
= 3
∆I
OUT
f • V
DROOP
More capacitance may be required depending on the duty
cycle and load-step requirements. In most applications,
the input capacitor is merely required to supply high
frequency bypassing, since the impedance to the supply
is very low. A 10μF ceramic capacitor is usually enough
for these conditions. Place this input capacitor as close
to the V
IN
pin as possible.
Output Power Good
In the MS8E package, when the LTC3621’s output voltage
is within the ±7.5% window of the regulation point, the
output voltage is good and the PGOOD pin is pulled high
with an external resistor. Otherwise, an internal open-drain
pull-down device (275Ω) will pull the PGOOD pin low.
To prevent unwanted PGOOD glitches during transients
or dynamic V
OUT
changes, the LTC3621’s PGOOD fall-
ing edge includes a blanking delay of approximately 32
switching cycles.
Frequency Sync Capability
The LTC3621 has the capability to sync to a frequency within
a ±40% range of the internal programmed frequency. It
takes 2 to 3 cycles of external clock pulses to engage the
sync mode. If the external clock signal were to stop switch-
ing during operation, it will take roughly 7μs for the part’s
internal sync signal to go low and respond accordingly.
Once engaged in sync, the LTC3621 immediately runs at
the external clock frequency in forced continuous mode.