Datasheet

LTC3617
3
3617fa
electrical characteristics
The l denotes the specifications which apply over the full operating junction
temperature range, otherwise specifications are at T
A
= 25°C. PV
IN
= SV
IN
= 3.3V, RT = SV
IN
unless otherwise specified (Notes 1, 2, 8).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
∆V
FB(LINEREG)
Feedback Voltage Line Regulation SV
IN
= PV
IN
= 2.25V to 5.5V,
VDDQIN = 1.5V (Notes 3, 4)
l
0.2 %/V
∆V
FB(LOADREG)
Feedback Voltage Load Regulation ITH from 0.5V to 0.9V (Notes 3, 4)
V
ITH
= SV
IN
(Note 5)
0.25
0.25
%
%
I
Q
Input DC Supply Current
Active Mode
Shutdown
V
FB
= 0.6V, VDDQIN = 1.5V (Note 6)
SV
IN
= PV
IN
= 5.5V, V
RUN
= 0V
1100
0.1 1
µA
µA
R
DS(ON)
Top Switch On-Resistance PV
IN
= 3.3V 35 mΩ
Bottom Switch On-Resistance PV
IN
= 3.3V 25 mΩ
I
LIM
Top Switch Positive Peak Current Limit Sourcing (Note 7), V
FB
= 0.5V 8 10 14 A
Top Switch Negative Peak Current Limit Sinking (Note 7) –12 –8 –5 A
g
m(EA)
Error Amplifier Transconductance –5µA < I
ITH
< 5µA (Note 4) 200 µS
I
EAO
Error Amplifier Maximum Output Current (Note 4) ±30 µA
t
SS
Internal Soft-Start Time V
FB
from 0.075V to 0.675V,
VDDQIN = 1.5V
0.4 0.85 2 ms
f
OSC
Oscillator Frequency
Internal Oscillator Frequency
R
T
= 370k
V
RT
= SV
IN
l
l
0.8
1.8
1
2.25
1.2
2.7
MHz
MHz
f
SYNC
Synchronization Frequency Range 0.3 4 MHz
V
SYNC
SYNC Input Threshold High Voltage
SYNC Input Threshold Low Voltage
1.2
0.3
V
V
I
SW(LKG)
Switch Leakage Current SV
IN
= PV
IN
= 5.5V, V
RUN
= 0V 0.1 1 µA
PGOOD Power Good Voltage Windows VDDQIN = 1.5V, Entering Window
V
FB
Ramping Up
V
FB
Ramping Down
–3.5
3.5
–5
5
%
%
VDDQIN = 1.5V, Leaving Window
V
FB
Ramping Up
V
FB
Ramping Down
8
–8
10
–10
%
%
t
PGOOD
Power Good Blanking Time Entering and Leaving Window 70 105 140 µs
R
PGOOD
Power Good Pull-Down On-Resistance 8 17 33 Ω
V
RUN
RUN voltage Input High
Input Low
l
l
1
0.4
V
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3617 is tested under pulsed load conditions such that
T
J
≈T
A
. The LTC3617E is guaranteed to meet performance specifications
over the 0°C to 85°C operating junction temperature range. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LTC3617I is guaranteed to meet specifications over the
full –40°C to 125°C operating junction temperature range. Note that
the maximum ambient temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors. The junction temperature
(T
J
, in °C) is calculated from the ambient temperature (T
A
, in °C) and
power dissipation (P
D
, in watts) according to the formula:
T
J
= T
A
+ (P
D
• θ
JA
), where θ
JA
(in °C/W) is the package thermal
impedance.
Note 3: This parameter is tested in a feedback loop which servos V
FB
to
the midpoint for the error amplifier (V
ITH
= 0.75V).
Note 4: External compensation on ITH pin.
Note 5: Tying the ITH pin to SV
IN
enables the internal compensation.
Note 6: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 7: In sourcing mode the average output current is flowing out of the
SW pin. In sinking mode the average output current is flowing into the SW
Pin.
Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.