Datasheet

LTC3617
18
3617fa
typical applications
0.75V, ±6A DDR Termination Using a 1MHz External Clock
RUN
VDDQIN
RT
PGOOD
ITH
PGOOD SGND
PGND
V
IN
2.5V TO 5.5V
VDDQ
1.5V
VTTR
SV
IN
LTC3617
SW
1MHz CLOCK
PV
IN
C
F
1µF
R
F
24Ω
L1
0.33µH
3617 TA03a
SYNC
V
FB
C
O2
100µF
C
C1
10pF
C
IN
22µF
×4
C
C
1.5nF
VTT
0.75V
±6A
C
O1
0.1µF
V
REF
0.75V
±10mA
R2
100k
R1
365k
L1: VISHAY IHLP-2525CZ-01 330nH
R
C
6k
External Start-Up Output Tracking Up/Down
500mV/DIV
2ms/DIV
3617 TA03b
VDDQ
V
REF
/VTT
500mV/DIV
4ms/DIV
3617 TA03c
VDDQ
V
REF
/VTT
package Description
3.00 ± 0.10
1.50 REF
5.00 ± 0.10
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
PIN 1
TOP MARK
(NOTE 6)
0.40 ± 0.10
23 24
1
2
BOTTOM VIEW—EXPOSED PAD
3.50 REF
0.75 ± 0.05
R = 0.115
TYP
PIN 1 NOTCH
R = 0.20 OR 0.25
× 45° CHAMFER
0.25 ± 0.05
0.50 BSC
0.200 REF
0.00 – 0.05
(UDD24) QFN 0808 REV Ø
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.70 ±0.05
0.25 ±0.05
3.50 REF
4.10 ± 0.05
5.50 ± 0.05
1.50 REF
2.10 ± 0.05
3.50 ± 0.05
PACKAGE OUTLINE
R = 0.05 TYP
1.65 ± 0.10
3.65 ± 0.10
1.65 ± 0.05
3.65 ± 0.05
0.50 BSC
UDD Package
24-Lead Plastic QFN (3mm × 5mm)
(Reference LTC DWG # 05-08-1833 Rev Ø)