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ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - DC/DC voltage regulator Holder QFN 24 EP
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LTC3615/LTC3615-1
23
3615fb
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applicaTions inForMaTion
External Reference Input (DDR Mode)
If SRLIM is tied to SV
IN
, the TRACK/SS pin can be used
as an external reference input between 0.3V and 0.5V, if
desired (see Figure 13).
In DDR mode, the maximum slew rate is selected. If V
TRACK/
SS
is within 0.3V and 0.5V, the PGOOD function is enabled.
If V
TRACK/SS
is less than 0.3V, the output current foldback
is disabled and the PGOOD pin is always pulled down.
Figure 13. Tracking if V
SRLIM
Is Low
Figure 14. Tracking if V
SRLIM
Is Tied to SV
IN
SOFT-START
STATE
t
SS
> 1ms
SHUTDOWN
STATE
0.6V
0.6V
0.1V
0V
0V
0V
0V
V
IN
V
IN
V
FB
PIN
VOLTAGE
TRACK/SS
PIN VOLTAGE
RUN PIN
VOLTAGE
SV
IN
PIN
VOLTAGE
RUN STATE RUN STATE
TIME
3615 F13
REDUCED
SWITCHING
FREQUENCY
DOWN-
TRACKING
STATE
UP-
TRACKING
STATE
SOFT-START
STATE
t
SS
> 1ms
SHUTDOWN
STATE
0.3V
0.45V
0.45V
0.3V
0.1V
0V
0V
0V
0V
V
IN
V
IN
V
FB
PIN
VOLTAGE
EXTERNAL
VOLTAGE
REFERENCE 0.45V
TRACK/SS
PIN VOLTAGE
RUN PIN
VOLTAGE
SV
IN
PIN
VOLTAGE
RUN STATE RUN STATE
TIME
3615 F14
REDUCED
SWITCHING
FREQUENCY
DOWN-
TRACKING
STATE
UP-
TRACKING
STATE
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