Datasheet

LTC3613
14
3613fa
APPLICATIONS INFORMATION
To avoid noise coupling into V
OSNS
+
, the resistor divider
should be placed near the V
OSNS
+
and V
OSNS
–
pins and
physically close to the LTC3613. The remote output and
ground traces should be routed together as a differential
pair to the remote output. These traces should be termi-
nated as close as physically possible to the remote output
point that is to be accurately regulated through remote
differential sensing.
Switching Frequency Programming
The choice of operating frequency is a trade-off between
efficiency and component size. Lowering the operating fre-
quency improves efficiency by reducing MOSFET switching
losses but requires larger inductance and/or capacitance
to maintain low output ripple voltage. Conversely, raising
the operating frequency degrades efficiency but reduces
component size.
The switching frequency of the LTC3613 can be pro-
grammed from 200kHz to 1MHz by connecting a resistor
from the RT pin to signal ground. The value of this resistor
is given by the following empirical formula:
R
T
kΩ
[]
=
41550
fkHz
[]
–2.2
R
FB1
SW
R
FB2
L
C
IN
V
IN
C
OUT1
C
OUT2
3613 F02
I
LOAD
OTHER CURRENTS
FLOWING IN
SHARED GROUND
PLANE
POWER TRACE
PARASITICS
±V
DROP(PWR)
+
–
GROUND TRACE
PARASITICS
±V
DROP(GND)
I
LOAD
LTC3613
V
OSNS
+
PGND
PV
IN
V
OSNS
–
Figure 2. Differential Output Sensing Used to Correct Line Loss Variations
in a High Power Distributed System with a Shared Ground Plane
Not counting resistor tolerances, the switching fre-
quency could still have a ±10% deviation from the ideal
programmed value. The internal PLL has a synchroniza-
tion range of ±30% around this programmed frequency.
Therefore, during external clock synchronization be sure
that the external clock frequency is within this ±30% range
of the RT programmed frequency. It is advisable that the
RT programmed frequency be equal to the external clock
for maximum synchronization margin. Refer to Phase and
Frequency Synchronization for further details.
Inductor Selection
The operating frequency and inductor selection are inter-
related in that higher operating frequencies allow the use of
smaller inductor and capacitor values. A higher frequency
generally results in lower efficiency because of MOSFET
gate charge losses and top MOSFET transition losses.
In addition to this basic trade-off, the effect of inductor
value on ripple current and low current operation must
also be considered.