Datasheet

LTC3611
19
3611fd
ApplicAtions inForMAtion
How to Reduce SW Ringing
As with any switching regulator, there will be voltage ring-
ing on the SW node, especially for high input voltages.
The ringing amplitude and duration is dependent on the
switching speed (gate drive), layout (parasitic inductance)
and MOSFET output capacitance. This ringing contributes
to the overall EMI, noise and high frequency ripple. One
way to reduce ringing is to optimize layout. A good layout
minimizes parasitic inductance. Adding RC snubbers from
SW to GND is also an effective way to reduce ringing.
Finally, adding a resistor in series with the BOOST pin
will slow down the MOSFET turn-on slew rate to dampen
r
i
nging, but at the cost of reduced efficiency. Note that
since the IC is buffered from the high frequency transients
by PCB and bondwire inductances, the ringing by itself is
normally not a concern for controller reliability.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
a multilayer board is recommended to help with heat
sinking of power components.
T
he ground plane layer should not have any traces and
it should be as close as possible to the layer with the
LTC3611.
Place C
IN
and C
OUT
all in one compact area, close to
the LTC3611. It may help to have some components
on the bottom side of the board.
K
eep small-signal components close to the LTC3611.
Ground connections (including LTC3611 SGND and
PGND) should be made through immediate vias to
the ground plane. Use several larger vias for power
components.
U
se a compact plane for the switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
U
se planes for V
IN
and V
OUT
to maintain good voltage
filtering and to keep power losses low.
F
lood all unused areas on all layers with copper. Flood-
ing with copper reduces the temperature rise of power
components. Connect these copper areas to any DC
net (V
IN
, V
OUT
, GND or to any other DC rail in your
system).
When laying out a printed circuit board without a ground
plane, use the following checklist to ensure proper opera-
tion of the controller. These items are also illustrated in
Figure 7.
S
egregate the signal and power grounds. All small-
signal components should return to the SGND pin at
one point, which is then tied to the PGND pin.
Connect the input capacitor(s), C
IN
, close to the IC. This
capacitor carries the MOSFET AC current.
K
eep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
C
onnect the INTV
CC
decoupling capacitor, C
VCC
, closely
to the INTV
CC
and PGND pins.
Connect the top driver boost capacitor, C
B
, closely to
the BOOST and SW pins.
C
onnect the V
IN
pin decoupling capacitor, C
F
, closely
to the V
IN
and PGND pins.