Datasheet

LTC3605A
16
3605afg
For more information www.linear.com/LTC3605A
operaTion
4. Solder the Exposed Pad (Pin 25) on the bottom of the
package to the PGND plane. Connect this PGND plane
to other layers with thermal vias to help dissipate heat
from the LTC3605A.
5. Keep sensitive components away from the SW pin. The
R
T
resistor, the compensation capacitor C
C
and C
ITH
and all the resistors R1, R3 and R
C
, and the INTV
CC
bypass capacitor, should be placed away from the SW
trace and the inductor L1. Also, the SW pin pad should
be kept as small as possible.
6. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small-
signal components returning to the SGND pin which is
then connected to the PGND pin at the negative terminal
of the output capacitor, C
OUT
.
Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components. These
copper areas should be connected to PGND.
Design Example
As a design example, consider using the LTC3605A in an
application with the following specifications:
V
IN
= 10.8V to 13.2V, V
OUT
= 1.8V, I
OUT(MAX)
= 5A,
I
OUT(MIN)
= 500mA, f = 2MHz
Because efficiency is important at both high and low load
current, discontinuous mode operation will be utilized.
First select from the characteristic curves the correct R
T
resistor value for 2MHz switching frequency. Based on that
R
T
should be 80.6k. Then calculate the inductor value for
about 50% ripple current at maximum V
IN
:
L =
1.8V
2MHz • 2.5A
⎛
⎝
⎜
⎞
⎠
⎟
1–
1.8V
13.2V
⎛
⎝
⎜
⎞
⎠
⎟
= 0.31µH
The nearest standard value inductor would be 0.33µH.
C
OUT
will be selected based on the ESR that is required to
satisfy the output voltage ripple requirement and the bulk
capacitance needed for loop stability. For this design, two
47µF ceramic capacitors will be used.
C
IN
should be sized for a maximum current rating of:
I
RMS
= 5A
1.8V
13.2V
⎛
⎝
⎜
⎞
⎠
⎟
13.2V
1.8V
– 1
⎛
⎝
⎜
⎞
⎠
⎟
1/2
= 1.7A
Decoupling the PV
IN
pins with two 22µF ceramic capaci-
tors is adequate for most applications.
Figure 3a. Sample PCB Layout—Topside Figure 3b. Sample PCB Layout—Bottom Side
V
IN
GND
V
OUT
C
IN
L1
3605A F03a
C
OUT
V
IN
V
OUT
3605A F03b
GND
Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.Downloaded from Arrow.com.