Datasheet

LTC3605A
11
3605afg
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derate the capacitor, or choose a capacitor rated at a
higher temperature than required.
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, DV
OUT
, is
determined by:
DV
OUT
< DI
L
1
8 • f • C
OUT
+ESR
⎛
⎝
⎜
⎞
⎠
⎟
The output ripple is highest at maximum input voltage
since DI
L
increases with input voltage. Multiple capaci-
tors placed in parallel may be needed to meet the ESR
and RMS current handling requirements.
Dry tantalum,
special polymer, aluminum electrolytic, and ceramic
capacitors are all available in surface mount packages.
Special polymer capacitors are very low ESR but have
lower capacitance density than other types. Tantalum
capacitors have the highest capacitance density but it is
important to only use types that have been surge tested
for use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
in cost-sensitive applications provided that consideration
is given to ripple current ratings and long-term reliability.
Ceramic capacitors have excellent low ESR characteristics
and small footprints. Their relatively low value of bulk
capacitance may require multiples in parallel.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
operaTion
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V
IN
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause
a voltage spike at V
IN
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage char
-
acteristics of all the ceramics for a given value and size.
Since the ESR of a ceramic capacitor is so low,
the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and the
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V
DROOP
, is
usually about 2 to 3 times the linear drop of the first cycle.
Thus, a good place to start with the output capacitor value
is approximately:
C
OUT
≈ 2.5
D
I
OUT
f
O
• V
DROOP
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance to
the supply is very low. A 22µF ceramic capacitor is usually
enough for these conditions. Place this input capacitor as
close to the PV
IN
pins as possible.
Inductor Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple current:
DI
L
=
V
OUT
f • L
1–
V
OUT
V
IN(MAX)
⎛
⎝
⎜
⎜
⎞
⎠
⎟
⎟
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