Datasheet

LTC3603
15
3603fc
For more information www.linear.com/LTC3603
applications inForMation
To prevent the LTC3603 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
T
R
= (P
D
) • (θ
JA
)
where P
D
is the power dissipated by the regulator and θ
JA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC3603 in dropout at an
input voltage of 8V, a load current of 2.5A and an ambient
temperature of 70°C. From the Typical Performance graph
of Switch Resistance, the R
DS(ON)
of the top switch at 70°C
is approximately 85mΩ. Therefore, power dissipated by
the part is:
P
D
= (I
LOAD
2
)(R
DS(ON)
) = (2.5A)
2
(85mΩ) = 0.53W
For the MSOP package, the θ
JA
is 45°C/W. Thus, the
junction temperature of the regulator is:
T
J
= 70°C + (0.53W)(45°C/W) = 93.85°C
which is below the maximum junction temperature of
125°C.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to DI
LOAD
•(ESR), where ESR is the effective series
resistance of C
OUT
. DI
LOAD
also begins to charge or dis-
charge C
OUT
, generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem. The I
TH
pin external components and output capacitor shown in the
front page application will provide adequate compensation
for most applications.
Design Example
As a design example, consider using the LTC3603 in
an application with the following specifications: V
IN
=
12V, V
OUT
= 3.3V, I
OUT(MAX)
= 2.5A, I
OUT(MIN)
= 100mA,
f = 1MHz. Because efficiency is important at both high and
low load current, Burst Mode operation will be utilized.
First, calculate the timing resistor:
R
OSC
=
1.15• 10
11
1MHz
–10k = 105k
Next, calculate the inductor value for about 40% ripple
current at maximum V
IN
:
L =
3.3V
1MHz
( )
1A
( )
⎛
⎝
⎜
⎞
⎠
⎟
• 1–
3.3V
12V
⎛
⎝
⎜
⎞
⎠
⎟
= 2.39µH
Using a 2.2µH inductor results in a maximum ripple cur-
rent of:
ΔI
L
=
3.3V
1MHz
( )
2.2µH
( )
⎛
⎝
⎜
⎞
⎠
⎟
• 1–
3.3V
12V
⎛
⎝
⎜
⎞
⎠
⎟
= 1.1A
C
OUT
will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. In this applica
-
tion, a tantalum capacitor will be used to provide the bulk
capacitance and a ceramic capacitor in parallel to lower
the total effective ESR. For this design, a 100µF ceramic
capacitor will be used. C
IN
should be sized for a maximum
current rating of:
I
RMS
= 2.5A •
3.3V
12V
•
12V
3.3V
–1= 1.12A
RMS
Decoupling the PV
IN
pin with a 22µF ceramic capacitor is
adequate for most applications.
The output voltage can now be programmed by choosing
the values of R1 and R2. Choose R1 = 105k and calculate
R2 as:
R2= R1
V
OUT
0.6V
–1
⎛
⎝
⎜
⎞
⎠
⎟
= 472.5k