Datasheet

LTC3600
16
3600fc
As an example, consider the case when the LTC3600 is
used in application where V
IN
= 12V, I
OUT
= 1.5A, frequency
= 4MHz, V
OUT
= 1.8V. The equivalent power MOSFET
resistance R
SW
is:
R
SW
= R
DS(ON)TOP
•
V
OUT
V
IN
+ R
DS(ON)BOT
•
V
IN
− V
OUT
V
IN
= 0.2 •
1.8
12
+ 0.1 •
10.2
12
= 0.115Ω
The V
IN
current during 4MHz forced continuous operation
with no load is about 11mA, which includes switching and
internal biasing current loss, transition loss, inductor core
loss and other losses in the application. Therefore, the
total power dissipated by the part is:
P
D
= I
OUT
2
• R
SW
+ V
IN
• I
VIN
(No Load)
= 2.25A
2
• 0.115Ω + 12V • 11mA = 0.39W
The DFN 3mm × 3mm package junction-to-ambient
thermal resistance, θ
JA
, is around 55°C/W. Therefore, the
junction temperature of the regulator operating in a 50°C
ambient temperature is approximately:
T
J
= 0.39W • 55
°C
W
+ 50°C = 71°C
Remembering that the above junction temperature is
obtained from an R
DS(ON)
at 25°C, we might recalculate
the junction temperature based on a higher R
DS(ON)
since
it increases with temperature. Redoing the calculation
assuming that R
SW
increased 25% at 71°C yields a new
junction temperature of 75°C, which is still very far away
from thermal shutdown or maximum allowed junction
temperature rating.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3600. Check the following in your layout:
1. Do the capacitors C
IN
connect to the power V
IN
and
power GND as close as possible? These capacitors
provide the AC current to the internal power MOSFETs
and their drivers.
2. Are C
OUT
and inductor closely connected? The (–) plate
of C
OUT
returns current to PGND and the (–) plate of
C
IN
.
3. The ground terminal of the ISET resistor must be
connected to the other quiet signal GND and together
connect to the power GND on only one point. The ISET
resistor should be placed and routed away from noisy
components and traces, such as the SW line, and its
trace should be minimized.
4. Keep sensitive components away from the SW pin. The
ISET resistor, R
T
resistor, the compensation components
C
ITH
and R
ITH
, and the INTV
CC
bypass capacitor, should
be routed away from the SW trace and the inductor.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the signal GND at one
point which is then connected to the power GND at the
exposed pad with minimal resistance.
Flood all unused areas on all layers with copper, which
reduces the temperature rise of power components.
These copper areas should be connected to one of the
input supplies: V
IN
or GND.
applicaTions inForMaTion