Datasheet
LTC3589/LTC3589-1/
LTC3589-2
14
3589ff
For more information www.linear.com/3589
pin FuncTions
ON (Pin 21): Pushbutton Input. A weak internal pull-up
forces ON high when left floating. A normally open push-
button is connected from ON to ground to force a low
state on this pin.
PBSTAT (Pin 22): Pushbutton Status. Open-drain output
to be used for processor interrupts. PBSTAT mirrors the
status of ON pushbutton pin. PBSTAT is delayed 50ms
from ON pin for debounce.
WAKE (Pin 23): System Wake Up. Open-drain driver output
releases high when signaled by pushbutton activation or
PWR_ON input. It may be used to initiate a pin-strapped
power-up sequence by connecting to a regulator enable pin.
PVIN2 (Pin 24): Power Input for Step-Down Switching
Regulator 2. Tie this pin to V
IN
supply. This pin should
be bypassed to ground with a 4.7µF or greater ceramic
capacitor.
SW2 (Pin 25): Switch Pin for Step-Down Switching Regula-
tor 2. Connect one side of step-down switching regulator
2 inductor to this pin.
SW3 (Pin 26): Switch Pin for Step-Down Switching Regula-
tor 3. Connect one side of step-down switching regulator
3 inductor to this pin.
PVIN3 (Pin 27): Power Input for Step-Down Switching
Regulator 3. Tie this pin to the V
IN
supply. This pin should
be bypassed to ground with a 4.7µF or greater ceramic
capacitor.
VSTB (Pin 28): Voltage Standby. When VSTB is low, DAC
reference registers are selected by bit values in command
register VCCR. When VSTB is high, the DAC registers are
forced xxDVT2 registers. Tie VSTB to ground if unused.
PGOOD (Pin 29): Power Good Output. Open-drain output
pulls down when any regulator falls below power good
threshold and during regulator dynamic voltage slew
unless disabled in I
2
C register. Pulls down when all regula-
tors are disabled.
SCL (Pin 30): Clock Input Pin for the I
2
C Serial Port. The
I
2
C logic levels are scaled with respect to DV
DD
.
SDA (Pin 31): Data Input Pin for the I
2
C Serial Port. The
I
2
C logic levels are scaled with respect to DV
DD
.
DV
DD
(Pin 32): Supply Voltage for I
2
C Serial Port. This
pin sets the logic reference level of SCL and SDA I
2
C pins.
DV
DD
resets I
2
C registers to power on state when driven
to <1V. SCL and SDA logic levels are scaled to DV
DD
. Con-
nect a 0.1µF decoupling capacitor from this pin to ground.
BUCK2_FB (Pin 33): Feedback Input for Step-Down
Switching Regulator 2. Set full-scale output voltage using
resistor divider connected from the output of step-down
switching regulator 2 to this pin to ground.
BUCK3_FB (Pin 34): Feedback Input for Step-Down
Switching Regulator 3. Set full-scale output voltage using
resistor divider connected from the output of step-down
switching regulator 3 to this pin to ground.
LDO1_FB (Pin 35): Feedback Input for LDO1. Set out-
put voltage using a resistor divider connected from
LDO1_STDBY to this pin to ground.
LDO1_STDBY (Pin 36): Always-On LDO1 Output. This pin
provides an always-on supply voltage useful for light loads
such as a watchdog microprocessor or a real-time clock.
Connect a 1µF capacitor from LDO1_STBY to ground.
V
IN
(Pin 37): Supply Voltage Input. This pin should
be bypassed to ground with a 1µF or greater ceramic
capacitor.
LDO2_FB (Pin 38): Feedback Input for LDO2. Set full-scale
output voltage using a resistor divider connected from
LDO2_OUT to this pin to ground.
BUCK1_FB (Pin 39): Feedback Input for Step-Down
Switching Regulator 1. Set full-scale output voltage using
resistor divider connected from the output of step-down
switching regulator 1 to this pin to ground.
BB_FB (Pin 40): Feedback Input for Buck-Boost Switching
Regulator 4. Set the output voltage using resistor divider
connected from BB_OUT to this pin to ground.
GND (Exposed Pad Pin 41): Ground. The Exposed Pad must
be connected to a continuous ground plane on the second
layer of the printed circuit board by several interconnect
vias directly under the LTC3589 for maximum heat transfer.