Datasheet

LTC3566/LTC3566-2
24
3566fb
APPLICATIONS INFORMATION
smaller 0805 case. The size of the input overshoot will be
determined by the Q of the resonant tank circuit formed
by C
IN
and the input lead inductance. It is recommended
to measure the input ringing with the selected compo-
nents to verify compliance with the Absolute Maximum
specifi cations.
Alternatively, the following soft connect circuit (Figure 5)
can be employed. In this circuit, capacitor C1 holds MP1
off when the cable is fi rst connected. Eventually C1 begins
to charge up to the USB input voltage applying increasing
gate support to MP1. The long time constant of R1 and
C1 prevent the current from building up in the cable too
fast thus dampening out any resonant overshoot.
Buck-Boost Regulator Output Voltage Programming
The buck-boost regulator can be programmed for output
voltages greater than 2.75V and less than 5.5V. The output
voltage is programmed using a resistor divider from the
V
OUT1
pin connected to the FB1 pin such that:
V
OUT1
= V
FB1
R1
R
FB
+1






where V
FB1
is fi xed at 0.8V (see Figure 6).
Closing the Feedback Loop
The LTC3566 family incorporates voltage mode PWM
control. The control to output gain varies with operation
region (buck, boost, buck-boost), but is usually no greater
than 20. The output fi lter exhibits a double pole response
given by:
f
FILTER_POLE
=
1
2•π •L•C
OUT
Hz
Where C
OUT
is the output fi lter capacitor.
The output fi lter zero is given by:
f
FILTER_ ZERO
=
1
2•π •R
ESR
•C
OUT
Hz
where R
ESR
is the capacitor equivalent series resis-
tance.
A troublesome feature in boost mode is the right-half plane
zero (RHP), and is given by:
f
RHPZ
=
V
IN1
2
2•π •I
OUT
•L•V
OUT1
Hz
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network (as shown in
Figure 6), can be incorporated to stabilize the loop but
at the cost of reduced bandwidth and slower transient
response. To ensure proper phase margin, the loop must
cross unity-gain a decade before the LC double pole.
The unity-gain frequency of the error amplifi er with the
Type I compensation is given by:
f
UG
=
1
2•π •R1•C
P1
Hz
Most applications demand an improved transient response
to allow a smaller output fi lter capacitor. To achieve a higher
bandwidth, Type III compensation is required. Two zeros
are required to compensate for the double-pole response.
Type III compensation also reduces any V
OUT1
overshoot
seen at start-up.
The compensation network depicted in Figure 7 yields the
transfer function:
V
C1
V
OUT1
=
1
R1• C1+C2
( )
•
1+sR2C2
()
•1+ s(R1+R3)C3
()
s• 1+
sR2C1C2
C1+C
2






•1+ sR3C3
( )
R1
40k
5V USB
INPUT
3566 F05
C1
100nF
C2
10μF
MP1
Si2333
USB CABLE
V
BUS
GND
LTC3566/
LTC3566-2
Figure 5. USB Soft Connect Circuit