Datasheet

LTC3566/LTC3566-2
14
3566fb
conductance is needed, an external P-channel MOSFET
transistor can be added from BAT to V
OUT
.
When an external P-channel MOSFET transistor is pres-
ent, the GATE pin of the LTC3566 family drives its gate for
automatic ideal diode control. The source of the external
P-channel MOSFET should be connected to V
OUT
and the
drain should be connected to BAT. Capable of driving a
1nF load, the GATE pin can control an external P-channel
MOSFET transistor having an on-resistance of 40mΩ or
lower.
Suspend LDO
If the LTC3566 family is confi gured for USB suspend mode,
the switching regulator is disabled and the suspend LDO
provides power to the V
OUT
pin (presuming there is power
available to V
BUS
). This LDO will prevent the battery from
running down when the portable product has access to
a suspended USB port. Regulating at 4.6V, this LDO only
becomes active when the switching converter is disabled
(suspended). In accordance with the USB specifi cation, the
input to the LDO is current limited so that it will not exceed
the 500μA low power suspend specifi cation. If the load
on V
OUT
exceeds the suspend current limit, the additional
current will come from the battery via the ideal diode.
3.3V Always-On Supply
The LTC3566 family includes a low quiescent current low
dropout regulator that is always powered. This LDO can be
used to provide power to a system pushbutton controller,
standby microcontroller or real time clock. Designed to
deliver up to 25mA, the always-on LDO requires at least
a 1μF low impedance ceramic bypass capacitor for com-
pensation. The LDO is powered from V
OUT
, and therefore
will enter dropout at loads less than 25mA as V
OUT
falls
near 3.3V. If the LDO3V3 output is not used, it should be
disabled by connecting it to V
OUT
.
V
BUS
Undervoltage Lockout (UVLO)
An internal undervoltage lockout circuit monitors V
BUS
and
keeps the PowerPath switching regulator off until V
BUS
rises above 4.30V and is about 200mV above the battery
voltage. Hysteresis on the UVLO turns off the regulator if
V
BUS
drops below 4.00V or to within 50mV of BAT. When
this happens, system power at V
OUT
will be drawn from
the battery via the ideal diode.
OPERATION
+
–
+
+
–
0.3V
1.188V 3.6V
CLPROG
I
SWITCH
/N
+
–
+
–
15mV
OV
IDEAL
DIODE
PWM AND
GATE DRIVE
AVERAGE INPUT
CURRENT LIMIT
CONTROLLER
AVERAGE OUTPUT
VOLTAGE LIMIT
CONTROLLER
CONSTANT CURRENT
CONSTANT VOLTAGE
BATTERY CHARGER
+
–
2
GATE
18
V
OUT
20
SW
SYSTEM LOAD
3.5V TO
(BAT + 0.3V)
OPTIONAL
EXTERNAL
IDEAL DIODE
PMOS
SINGLE CELL
Li-Ion
3566 F03
22
BAT
19
V
BUS
TO USB
OR WALL
ADAPTER
21
+
Figure 3. PowerPath Block Diagram