LTC3556 High Efficiency USB Power Manager with Dual Buck and Buck-Boost DC/DCs DESCRIPTION FEATURES POWER MANAGER n High Efficiency Switching PowerPathTM Controller with Bat-TrackTM Adaptive Output Control n Programmable USB or Wall Current Limit (100mA/500mA/1A) n Full Featured Li-Ion/Polymer Battery Charger n Instant-On Operation with a Discharged Battery n 1.
LTC3556 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) BAT VOUT SW VBUS TOP VIEW SEQ ENALL VBUS (Transient) t < 1ms, Duty Cycle < 1% .. –0.3V to 7V VIN1, VIN2, VIN3, VBUS (Static), DVCC, FB1, FB2, NTC, BAT, ENALL, SCL, SDA, PGOODALL, CHRG ....................................... –0.3V to 6V SEQ ....................–0.3V to Lesser of 6V or (VOUT + 0.3V) FB3, VC3 .............. –0.3V to Lesser of 6V or (VIN3 + 0.3V) ICLPROG ....................................................................
LTC3556 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, VIN1 = VIN2 = VIN3 = VOUT3 = 3.8V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3.01k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN IOUT(POWERPATH) VOUT Current Available Before Loading 1x Mode, BAT = 3.3V BAT 5x Mode, BAT = 3.3V 10x Mode, BAT = 3.3V Suspend Mode 135 672 1251 0.
LTC3556 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, VIN1 = VIN2 = VIN3 = VOUT3 = 3.8V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3.01k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCOLD Cold Temperature Fault Threshold Voltage Rising Threshold Hysteresis 75.0 76.5 1.5 78.
LTC3556 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, VIN1 = VIN2 = VIN3 = VOUT3 = 3.8V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3.01k, unless otherwise noted. SYMBOL PARAMETER tHD_DAT(I) Data Hold Time Input tSU_DAT CONDITIONS MIN TYP MAX UNITS 0 ns Data Setup Time 100 ns tLOW SCL Clock Low Period 1.
LTC3556 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VBUS = 5V, VIN1 = VIN2 = VIN3 = VOUT3 = 3.8V, BAT = 3.8V, DVCC = 3.3V, RPROG = 1k, RCLPROG = 3.01k, unless otherwise noted. SYMBOL PARAMETER CONDITIONS VFB2 VFB2 Servo Voltage (Note 7) RP2 PMOS RDS(ON) 0.6 Ω RN2 NMOS RDS(ON) 0.7 Ω RLDO_CL2 LDO Mode Closed-Loop ROUT 0.
LTC3556 TYPICAL PERFORMANCE CHARACTERISTICS Ideal Diode Resistance vs Battery Voltage Ideal Diode V-I Characteristics 1.0 0.25 INTERNAL IDEAL DIODE WITH SUPPLEMENTAL EXTERNAL VISHAY Si2333 PMOS 4.50 0.20 INTERNAL IDEAL DIODE ONLY 0.4 0.2 4.25 INTERNAL IDEAL DIODE 0.15 0.10 INTERNAL IDEAL DIODE WITH SUPPLEMENTAL EXTERNAL VISHAY Si2333 PMOS 0.05 VBUS = 0V VBUS = 5V 0.12 0.16 0.08 FORWARD VOLTAGE (V) 0 2.7 0.20 3.0 3.6 3.9 3.
LTC3556 TYPICAL PERFORMANCE CHARACTERISTICS Output Voltage vs Load Current in Suspend VBUS Current vs Load Current in Suspend 5.0 3.5 3.0 0.1 0.3 0.2 0.3 0.4 0.2 LOAD CURRENT (mA) 0 0.5 0.3 0.4 0.2 LOAD CURRENT (mA) 3556 G10 600 0.5 200 15 20 10 LOAD CURRENT (mA) 25 Low-Battery (Instant On) Output Voltage vs Temperature 4.21 3.68 4.20 3.66 BAT = 2.
LTC3556 TYPICAL PERFORMANCE CHARACTERISTICS PGOODALL, CHRG Pin Current vs Voltage (Pull-Down State) 50 VBUS = 5V BAT = 3.8V 80 ILDO3V3 5mA/DIV 60 0mA 40 VLDO3V3 20mV/DIV AC COUPLED 20 0 Battery Drain Current vs Temperature 40 BATTERY CURRENT (μA) PGOODALL, CHRG PIN CURRENT (mA) 100 3.3V LDO Step Response (5mA to 15mA) BAT = 3.8V 1 3 4 2 PGOODALL, CHRG PIN VOLTAGE (V) 0 30 20 10 3556 G20 20μs/DIV BAT = 3.
LTC3556 TYPICAL PERFORMANCE CHARACTERISTICS Switching Regulator 3 Burst Mode Operation Input Quiescent Current Switching Regulators 1, 2 Load Regulation at VOUT1,2 = 2.5V 14.0 VBUS = 3.8V 2600 VOUT3 = 3.3V TA = 27°C VIN3 = 3V VIN3 = 3.6V PULSE SKIP MODE 2.50 2550 VIN3 = 4.5V 2.53 Burst Mode OPERATION VIN3 = 3.6V 13.0 IVIN3 (μA) OUTPUT VOLTAGE (V) 13.5 FORCED Burst Mode OPERATION 2500 VIN3 = 3V ILIMF3 (mA) 2.56 Switching Regulator 3 Forward Current Limit vs Temperature 12.5 VIN3 = 4.
LTC3556 TYPICAL PERFORMANCE CHARACTERISTICS Start-Up Sequencing with SEQ = 0V VIN1 = VIN2 = VIN3 = 4.2V All Outputs Loaded with 5mA Switching Regulator 3 Step Response (0mA to 300mA) VOUT3 V = 3.8V 100mV/DIV VIN3 = 3.3V OUT3 AC COUPLED ENALL VOUT3 = 3.3V 1V/DIV VOUT2 = 1.8V VOUT1 = 1.6V 300mA IOUT3 200mA/ 0 DIV 100μs/DIV 3556 G35 200μs/DIV 3556 G36 PIN FUNCTIONS LDO3V3 (Pin 1): 3.3V LDO Output Pin. This pin provides a regulated, always-on, 3.3V supply voltage. LDO3V3 gets its power from VOUT.
LTC3556 PIN FUNCTIONS SCL (Pin 13): Clock Input Pin for the I2C Serial Port. The I2C logic levels are scaled with respect to DVCC. to BAT. If the external ideal diode FET is not used, GATE should be left floating. SWCD3 (Pin 14): Switch Node for (Buck-Boost) Switching Regulator 3. Connected to internal power switches C and D. External inductor connects between this node and SWAB3. BAT (Pin 23): Single Cell Li-Ion Battery Pin.
LTC3556 BLOCK DIAGRAM VBUS 25 2.25MHz PowerPath SWITCHING REGULATOR 26 SW 1 LDO3V3 3.3V LDO SUSPEND LDO 500μA + – + BATTERY TEMPERATURE MONITOR IDEAL CC/CV CHARGER + + – CLPROG 2 NTC 3 24 VOUT – + 0.3V +– 22 GATE – 15mV 23 BAT 3.6V 1.188V 20 PROG 5 VIN1 EN1 CHRG 21 CHARGE STATUS 4 SW1 400mA 2.25MHz (BUCK) SWITCHING REGULATOR 1 D/A 4 6 FB1 18 VIN2 EN2 400mA 2.
LTC3556 TIMING DIAGRAM I2C Timing Diagram DATA BYTE A ADDRESS DATA BYTE B WR A7 0 0 0 1 0 0 1 0 SDA 0 0 0 1 0 0 1 0 ACK SCL 1 2 3 4 5 6 7 8 9 A6 A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0 START STOP ACK 1 2 3 4 5 6 7 8 9 ACK 1 2 3 4 5 6 7 8 9 SDA tSU, STA tSU, DAT tLOW tHD, STA tHD, DAT tBUF tSU, STO 3556 TD SCL tHIGH tHD, STA START CONDITION tr tSP tf REPEATED START CONDITION STOP CONDITION START CONDITION OPERATION Introduction
LTC3556 OPERATION If the voltage at BAT is below 3.3V, or the battery is not present and the load requirement does not cause the switching regulator to exceed the USB specification, VOUT will regulate at 3.6V, thereby providing instant-on operation. If the load exceeds the available power, VOUT will drop to a voltage between 3.6V and the battery voltage. If there is no battery present when the load exceeds the available USB power, VOUT can drop toward ground.
LTC3556 OPERATION VOUT is approximately 15mV (VFWD) below the voltage at BAT. The resistance of the internal ideal diode is approximately 180mΩ. If this is sufficient for the application, then no external components are necessary. However, if more conductance is needed, an external P-channel MOSFET transistor can be added from BAT to VOUT. When an external P-channel MOSFET transistor is present, the GATE pin of the LTC3556 drives its gate for automatic ideal diode control.
LTC3556 OPERATION Battery Charger The LTC3556 includes a constant-current/constant-voltage battery charger with automatic recharge, automatic termination by safety timer, low voltage trickle charging, bad cell detection and thermistor sensor input for out-oftemperature charge pausing. Battery Preconditioning When a battery charge cycle begins, the battery charger first determines if the battery is deeply discharged. If the battery voltage is below VTRKL, typically 2.
LTC3556 OPERATION drive an indicator LED through a current limiting resistor for human interfacing or simply a pull-up resistor for microprocessor interfacing. To make the CHRG pin easily recognized by both humans and microprocessors, the pin is either Low for charging, High for not charging, or it is switched at high frequency (35kHz) to indicate the two possible faults, unresponsive battery and battery temperature out of range.
LTC3556 OPERATION have approximately 3°C of hysteresis to prevent oscillation about the trip point. Grounding the NTC pin disables the NTC charge pausing function. Thermal Regulation To optimize charging time, an internal thermal feedback loop may automatically decrease the programmed charge current. This will occur if the die temperature rises to approximately 110°C.
LTC3556 OPERATION Table 2. I2C Serial Port Mapping (Defaults to 0xFF00 in Reset State or if DVCC = 0V) A7 A6 A5 A4 A3 Switching Regulator 1 Voltage (See Table 4) A2 A1 A0 Switching Regulator 3 Voltage (See Table 4) B7 Disable Battery Charger B6 B5 B4 B3 B2 B1 B0 Switching Regulator Enable Enable Enable Input Current Limit Modes (See Table 5) Regulator Regulator Regulator (See Table 3) 1 2 3 Bus Write Operation Table 3.
LTC3556 OPERATION Disabling the I2C Port The I2C serial port can be disabled by grounding the DVCC pin. In this mode, control automatically passes to the individual logic input pins ENALL and SEQ. However, considerable functionality is not available in this mode such as the ability to independently enable the three switching regulators and disable the battery charger. In addition, with the I2C port disabled, both programmable switching regulators default to a fixed servo voltage of 0.
LTC3556 OPERATION greater than 0.8V. A variety of capacitor sizes can be used for CFB but a value of 10pF is recommended for most applications. Experimentation with capacitor sizes between 2pF and 22pF may yield improved transient response. Buck Regulator Operating Modes The LTC3556’s buck regulators include four possible operating modes to meet the noise/power needs of a variety of applications.
LTC3556 OPERATION tors and deliver continuous power from their SWx pins through their respective inductors. This mode gives the lowest possible output noise as well as low quiescent current at light loads. The buck regulators allow mode transition on the fly, providing seamless transition between modes even under load. This allows the user to switch back and forth between modes to reduce output ripple or increase low current efficiency as needed.
LTC3556 OPERATION Input Current Limit Buck-Boost Regulator Burst Mode Operation The input current limit comparator will shut the input PMOS switch off once current exceeds 2.5A (typical). The 2.5A input current limit also protects against a grounded VOUT3 node. In Burst Mode operation, the buck-boost regulator uses a hysteretic FB3 voltage algorithm to control the output voltage. By limiting FET switching and using a hysteretic control loop, switching losses are greatly reduced.
LTC3556 OPERATION Buck-Boost Regulator Soft-Start Operation Soft-start is accomplished by gradually increasing the reference voltage input to the error amplifier over a 0.5ms (typical) period. This limits transient inrush currents during start-up because the output voltage is always “in regulation.” Ramping the reference voltage input also limits the rate of increase in the VC3 voltage which helps minimize output overshoot during start-up.
LTC3556 APPLICATIONS INFORMATION To prevent large VOUT voltage steps during transient load conditions, it is also recommended that a ceramic capacitor be used to bypass VOUT. The output capacitor is used in the compensation of the switching regulator. At least 4μF of actual capacitance with low ESR are required on VOUT. Additional capacitance will improve load transient performance and stability. Multilayer ceramic chip capacitors typically have exceptional ESR performance.
LTC3556 APPLICATIONS INFORMATION 400mA Step-Down Switching Regulator Input/Output Capacitor Selection Low ESR (equivalent series resistance) MLCC capacitors should be used at both buck regulator outputs as well as at each buck regulator input supply (VIN1 and VIN2). Only X5R or X7R ceramic capacitors should be used because they retain their capacitance over wider voltage and temperature ranges than other ceramic types. A 10μF output capacitor is sufficient for most applications.
LTC3556 APPLICATIONS INFORMATION Closing the Feedback Loop The LTC3556 incorporates voltage mode PWM control. The control to output gain varies with operation region (buck, boost, buck-boost), but is usually no greater than 20. The output filter exhibits a double-pole response given by: where COUT is the output filter capacitor. The output filter zero is given by: 1 2 • π • RESR • COUT Hz where RESR is the capacitor equivalent series resistance.
LTC3556 APPLICATIONS INFORMATION the LC double pole combined with the –90° of phase lag from the right-half plane zero will result in negating the phase bump of the compensator. The compensator zeros should be placed either before or only slightly after the LC double pole such that their positive phase contributions offset the –180° that occurs at the filter double pole. If they are placed at too low of a frequency, they will introduce too much gain to the system and the crossover frequency will be too high.
LTC3556 APPLICATIONS INFORMATION in the following examples, has a nominal value of 100k and follows the Vishay “Curve 1” resistance-temperature characteristic. In the explanation below, the following notation is used. R25 = Value of the thermistor at 25°C RNTC|COLD = Value of thermistor at the cold trip point to the nonlinear behavior of the thermistor. The following equations can be used to easily calculate a new value for the bias resistor: RNOM = rHOT • R25 0.536 RNOM = rCOLD • R25 3.
LTC3556 APPLICATIONS INFORMATION VBUS LTC3556 NTC BLOCK VBUS RNOM 100k NTC 0.765 • VBUS TOO_COLD + 3 T – RNTC 100k – TOO_HOT 0.349 • VBUS + + NTC_ENABLE 0.017V • VBUS – 3556 F07a (7a) VBUS VBUS RNOM 105k NTC LTC3556 NTC BLOCK 0.765 • VBUS – TOO_COLD 3 + R1 12.7k – TOO_HOT 0.349 • VBUS T RNTC 100k + + NTC_ENABLE 0.017 • VBUS – 3556 F07b (7b) Figure 7.
LTC3556 APPLICATIONS INFORMATION USB Inrush Limiting Printed Circuit Board Layout Considerations When a USB cable is plugged into a portable product, the inductance of the cable and the high-Q ceramic input capacitor form an L-C resonant circuit. If the cable does not have adequate mutual coupling or if there is not much impedance in the cable, it is possible for the voltage at the input of the product to reach as high as twice the USB voltage (~10V) before it settles out.
LTC3556 APPLICATIONS INFORMATION The GATE pin for the external ideal diode controller has extremely limited drive current. Care must be taken to minimize leakage to adjacent PC board traces. 100nA of leakage from this pin will introduce an offset to the 15mV ideal diode of approximately 10mV. To minimize leakage, the trace can be guarded on the PC board by surrounding it with VOUT connected metal, which should generally be less that one volt higher than GATE.
LTC3556 TYPICAL APPLICATION Watchdog Microcontroller Operation USB/WALL 4.5V TO 5.5V 25 C1 10μF SW VBUS VOUT 100k 3 20 T 2k 8.25Ω 0.1μF 2 GATE NTC BAT PROG CLPROG GND 3.01k CHRG VOUT3 26 L1 3.3μH TO OTHER LOADS 24 22 MP1 23 + Li-Ion 29 510Ω C2 22μF RED 2.5V TO 3.3V 1A 21 12 HDD 10pF 121k 1 1μF 10 LDO3V3 DVCC VC3 15k VIN3 9 324k 22μF 2.2μF 105k L2 2.2μH 11 LTC3555 SW2 33pF 330pF 7 FB3 14 SWCD3 SWAB3 PUSHBUTTON MICROCONTROLLER 8 19 L3 4.7μH 1.8V 400mA I/O 1.
LTC3556 PACKAGE DESCRIPTION UFD Package 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B) 0.70 ±0.05 4.50 ± 0.05 3.10 ± 0.05 2.50 REF 2.65 ± 0.05 3.65 ± 0.05 PACKAGE OUTLINE 0.25 ±0.05 0.50 BSC 3.50 REF 4.10 ± 0.05 5.50 ± 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 4.00 ± 0.10 (2 SIDES) 0.75 ± 0.05 R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 s 45° CHAMFER 2.50 REF R = 0.115 TYP 27 28 0.40 ± 0.
LTC3556 TYPICAL APPLICATION Pushbutton Start with Automatic Sequencing, Reverse Input Voltage Protection and 10 Second Push and Hold Hard Shutdown MP1 USB CONNECTOR 25 VOUT3 VBUS 10μF VC3 10 4.7k DVCC 9 SWAB3 15 PGOODALL CORE LDO3V3 1μF 1k MEMORY 8 7 FB3 14 SWCD3 0.
