Datasheet

LTC3554/LTC3554-1/
LTC3554-2/LTC3554-3
5
3554123fd
SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS
PUSHBUTTON INTERFACE ELECTRICAL CHARACTERISTICS
The l denotes
specifications that apply over the full operating junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2).
V
OUT
= BVIN = 3.8V, PWR_ON1 = PWR_ON2 = 0V, unless otherwise noted.
The l denotes
specifications that apply over the full operating junction temperature range, otherwise specifications are at T
A
= 25°C (Note 2).
V
BAT
= 3.8V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Switching Regulator 2 in Normal Operation (STBY Low)
I
LIM2
Peak PMOS Current Limit PWR_ON2 = 3.8V (Note 7) 300 450 600 mA
V
FB2
Regulated Feedback Voltage PWR_ON2 = 3.8V
l
780 800 820 mV
D2 Max Duty Cycle 100 %
R
P2
R
DS(ON)
of PMOS I
SW2
= 100mA 1.1 Ω
R
N2
R
DS(ON)
of NMOS I
SW2
= –100mA 0.7 Ω
Switching Regulator 2 in Standby Mode (STBY High)
V
FB2_LOW
Feedback Voltage Threshold PWR_ON2 = 3.8V, V
FB2
Falling
l
770 800 820 mV
I
SHORT2_SB
Short-Circuit Current 10 21 50 mA
V
DROP2_SB
Standby Mode Dropout Voltage PWR_ON2 = 2.9V, I
SW2
= 5mA, V
FB2
= 0.77V, V
OUT
= 2.9V, BVIN = 2.9V
25 60 mV
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Pushbutton Pin (ON)
V
CC_PB
Pushbutton Operating Supply Range (Notes 4 , 9)
l
2.7 5.5 V
V
ON_TH
ON Threshold Rising
ON Threshold Falling
0.4
1.2 V
V
I
ON
ON Input Current V
ON
= V
CC
(Note 4) –1 1 µA
R
PB_PU
Pushbutton Pull-Up Resistance Pull-Up to V
CC
(Note 4) 200 400 650 kΩ
Logic Input Pins (PWR_ON1, PWR_ON2)
V
PWR_ONx
PWR_ONx Threshold Rising
PWR_ONx Threshold Falling
0.4
1.2 V
V
I
PWR_ONx
PWR_ONx Input Current –1 1 µA
Status Output Pins (PBSTAT, PGOOD)
I
PBSTAT
PBSTAT Output High Leakage Current V
PBSTAT
= 3V –1 1 µA
V
PBSTAT
PBSTAT Output Low Voltage I
PBSTAT
= 3mA 0.1 0.4 V
I
PGOOD
PGOOD Output High Leakage Current V
PGOOD
= 3V –1 1 µA
V
PGOOD
PGOOD Output Low Voltage I
PGOOD
= 3mA 0.1 0.4 V
V
THPGOOD
PGOOD Threshold Voltage (Note 10) –8 %
Pushbutton Timing Parameters (Note 11)
t
ON_PBSTATL
Minimum ON Low Time to Cause PBSTAT
Low
ON Brought Low During Power-On (PON) or
Power-Up (PUP1, PUP2) States
50 ms
t
ON_
PBSTATH
Delay from ON High to PBSTAT High Power-On (PON) State, After PBSTAT Has Been
Low for at Least t
PBSTAT_PW
900 µs
t
ON_PUP
Minimum ON Low Time to Enter
Power-Up (PUP1 or PUP2) State
Starting in the Hard Reset (HR) or Power-Off
(POFF) States
400 ms
t
ON_HR
Minimum ON Low Time to Hard Reset ON Brought Low During the Power-On (PON)or
Power-Up (PUP1, PUP2) States
LTC3554/LTC3554-1
LTC3554-2/LTC3554-3
4
11
5
14
6
17
s
s
t
PBSTAT_PW
PBSTAT Minimum Pulse Width Power-On (PON) or Power-Up (PUP1, PUP2)
States
40 50 ms