Datasheet

ManualsBrandsLINEAR TECHNOLOGY ManualsPMICsPMIC - power management - special purpose 10 µA QFN 20 (3x3)

LTC3554/LTC3554-1/

LTC3554-2/LTC3554-3

3554123fd

TYPICAL APPLICATION

DESCRIPTION

Micropower USB Power

Manager with Li-Ion Charger

and Two Step-Down Regulators

The LTC

3554 family* are micropower, highly integrated

power management and battery charger ICs for single-cell

Li-Ion/Polymer battery applications. They include a

PowerPath™ manager with automatic load prioritization,

a battery charger, an ideal diode and numerous internal

protection features. Designed specifically for USB applica-

tions, the LTC3554 power managers automatically limit

input current to a maximum of either 100mA or 500mA.

Battery charge current is automatically reduced such that

the sum of the load current and the charge current does

not exceed the selected input current limit.

The LTC3554 also includes two synchronous step-down

switching regulators as well as a pushbutton controller.

With all supplies enabled in standby mode, the quiescent

current drawn from the battery is only 10μA. The LTC3554

family are available in a 3mm × 3mm × 0.75mm 20-lead

QFN package.

Battery Drain Current

vs Temperature

FEATURES

APPLICATIONS

10μA Standby Mode Quiescent Current (All Outputs On)

Seamless Transition Between Input Power Sources:

Li-Ion/Polymer Battery and USB

240mΩ Internal Ideal Diode

Dual High Efficiency Step-Down Switching Regulators

(200mA I

OUT

) with Adjustable Output Voltages

Pushbutton On/Off Control with System Reset

Reset Time: 5 sec (LTC3554/LTC3554-1),

14 sec (LTC3554-2/LTC3554-3)

Full Featured Li-Ion/Polymer Battery Charger

Programmable Charge Current with Thermal Limiting

Instant-On Operation with Discharged Battery

Battery Float Voltage: 4.2V (LTC3554/LTC3554-2/

LTC3554-3), 4.1V (LTC3554-1)

3mm × 3mm × 0.75mm 20-Lead QFN Package

USB-Based Handheld Products

Portable Li-Ion/Polymer Based Electronic Devices

Fitness Computers

Low Power Medical Devices

BUS

NTC

PROG

HPWR

SUSP

PWR_ON1

FSEL

STBY

PGOOD

PWR_ON2

PBSTAT

OUT

CHRG

BAT

BVIN

SW1

FB1

SW2

FB2

ON/OFF

Li-Ion

BATTERY

100k

100k T

1.87k

10pF 10µF

2.2µF

2.05M

649k

3.3V

200mA

4.7µH

10pF 10µF332k

649k

1.2V

200mA

3554 TA01a

10µH

SYSTEM

LOAD

4.35V TO 5.5V

USB INPUT

LTC3554

10µF10µF

TEMPERATURE (°C)

–75 –50 –25 25 50 75 100 1250

BATTERY DRAIN CURRENT (µA)

3554 TA01b

BOTH REGULATORS DISABLED

ONE REGULATOR ENABLED

HARD RESET

BOTH REGULATORS

ENABLED

BAT

= 3.8V

STBY = 3.8V

REGULATORS LOAD = 0mA

L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks

and PowerPath, Hot Swap and Bat-Track are trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Protected by U.S. Patents,

including 6522118, 6700364, 5481178, 6304066, 6570372, 6580258, 7511390.

*See table on page 2 for available options.

Summary of content (36 pages)

PAGE 1
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 Micropower USB Power Manager with Li-Ion Charger and Two Step-Down Regulators DESCRIPTION FEATURES n n n n n n n n n n n 10μA Standby Mode Quiescent Current (All Outputs On) Seamless Transition Between Input Power Sources: Li-Ion/Polymer Battery and USB 240mΩ Internal Ideal Diode Dual High Efficiency Step-Down Switching Regulators (200mA IOUT) with Adjustable Output Voltages Pushbutton On/Off Control with System Reset Reset Time: 5 sec (LTC3554/LTC3554-1), 14 sec
PAGE 2
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2, 3) VBUS, VOUT, BVIN t < 1ms and Duty Cycle < 1%.................... –0.3V to 7V Steady State............................................. –0.3V to 6V BAT, NTC, CHRG, SUSP, PBSTAT, ON, PGOOD, FB1, FB2................................... –0.3V to 6V PWR_ON1, PWR_ON2, STBY HPWR, FSEL (Note 4).......................–0.3V to VCC + 0.3V IBAT..............................................................................
PAGE 3
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 POWER MANAGER ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2), VBUS = 5V, VBAT = 3.8V, HPWR = SUSP = PWR_ON1 = PWR_ON2 = 0V, RPROG = 1.87k, STBY = High, unless otherwise noted.
PAGE 4
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 POWER MANAGER ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2), VBUS = 5V, VBAT = 3.8V, HPWR = SUSP = PWR_ON1 = PWR_ON2 = 0V, RPROG = 1.87k, STBY = High, unless otherwise noted.
PAGE 5
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 SWITCHING REGULATOR ELECTRICAL CHARACTERISTICS l denotes The specifications that apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VOUT = BVIN = 3.8V, PWR_ON1 = PWR_ON2 = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS Switching Regulator 2 in Normal Operation (STBY Low) Peak PMOS Current Limit PWR_ON2 = 3.8V (Note 7) ILIM2 l Regulated Feedback Voltage PWR_ON2 = 3.
PAGE 6
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 PUSHBUTTON INTERFACE ELECTRICAL CHARACTERISTICS l denotes The specifications that apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VBAT = 3.8V, unless otherwise noted.
PAGE 7
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL PERFORMANCE CHARACTERISTICS 400 VBUS Supply Current vs Temperature (Suspend Mode) 25 VBUS = 5V HPWR = L 15 IBUS (µA) IBUS (µA) 14 300 10 250 5 200 –75 –50 –25 0 –75 –50 –25 0 25 50 75 100 125 150 TEMPERATURE (°C) VBAT = 3.8V STBY = 3.
PAGE 8
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL PERFORMANCE CHARACTERISTICS 4.22 VBUS = 5V HPWR = H 4.20 VFLOAT (V) 4.12 4.16 4.14 4.12 LTC3554-1 LTC3554-1 4.08 –75 –50 –25 0 25 50 75 TEMPERATURE (°C) 3554 G08 VBUS 250 VFWD (mV) VBUS = 5V 5V 150 IBUS 0.5A/DIV 0A VBUS = 0V 100 VOUT 0 3.2 3.6 VBAT (V) 4 5V 0 5V 1ms/DIV 50µs/DIV 3554 G12 VBAT = 3.75V IOUT = 100mA RPROG = 2k 1200 4.4 IBAT 0.5A/DIV 0A 50 1000 2.8 0 IBUS 0A 0.5A/DIV IBAT 0A 0.5A/DIV 600 800 IBAT (mA) 2.
PAGE 9
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL PERFORMANCE CHARACTERISTICS 100 Step-Down Switching Regulator 1 3.3V Output Efficiency vs IOUT1 Step-Down Switching Regulator 1 2.5V Output Efficiency vs IOUT1 80 70 70 70 40 30 EFFICIENCY (%) 80 50 60 50 40 30 3.8V 5V 0 0.01 0.1 1 10 IOUT1 (mA) 100 3.8V 5V 10 0 0.01 1000 0.1 1 10 IOUT1 (mA) 100 35 30 BVIN SUPPLY CURRENT (µA) EFFICIENCY (%) 70 60 50 40 30 20 0 0.01 0.
PAGE 10
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL PERFORMANCE CHARACTERISTICS Step-Down Switching Regulator Feedback Voltage vs Output Current Step-Down Switching Regulator Switch Impedance vs Temperature 1.6 1.4 0.815 PMOS 1.2 FEEDBACK VOLTAGE (V) SWITCH IMPEDANCE (Ω) 0.820 BVIN = 3.2V STBY = L 1.0 NMOS 0.8 TA = 25°C, unless otherwise specified. 0.6 0.4 Step-Down Switching Regulator Start-Up Waveform VOUT2 50mV/DIV (AC) 3.8V 5V STBY = L 0.810 VOUT1 1V/DIV 0.
PAGE 11
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 PIN FUNCTIONS HPWR (Pin 1): High Power Logic Input. When this pin is low the input current limit is set to 100mA and when this pin is driven high it is set to 500mA. The SUSP pin needs to be low for the input current limit circuit to be enabled. This pin has a conditional internal pull-down resistor when power is applied to the VBUS pin. FSEL (Pin 2): Buck Frequency Select. When this pin is low the buck switching frequency is set to 1.
PAGE 12
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 PIN FUNCTIONS The LTC3554 will partition the available power between the external load on VOUT and the internal battery charger. Priority is given to the external load and any extra power is used to charge the battery. An ideal diode from BAT to VOUT ensures that VOUT is powered even if the load exceeds the allotted input current from VBUS or if the VBUS power source is removed. VOUT should be bypassed with a low impedance multilayer ceramic capacitor.
PAGE 13
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 BLOCK DIAGRAM 18 VOUT VBUS 20 HPWR INPUT CURRENT LIMIT 1 SUSP 19 CC/CV CHARGER 17 BAT 16 PROG EXTPWR UVLO NTC 15 BATTERY TEMP MONITOR OSC 0.8V CHRG 14 13 SW1 CHARGE STATUS EN STBY 6 FB1 200mA STEP-DOWN DC/DC FSEL 2 2.25MHz/ 1.125MHz OSCILLATOR 12 BVIN OSC 0.
PAGE 14
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Introduction The LTC3554 is a highly integrated power management IC that includes the following features: standby mode which can be used to power essential keep-alive circuitry while draining ultralow current from the battery for extended battery life.
PAGE 15
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Ideal Diode From BAT to VOUT Battery Charger The LTC3554 has an internal ideal diode from BAT to VOUT designed to respond quickly whenever VOUT drops below BAT. If the load increases beyond the input current limit, additional current will be pulled from the battery via the ideal diode. Furthermore, if power to VBUS (USB) is removed, then all of the application power will be provided by the battery via the ideal diode.
PAGE 16
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Automatic Recharge After the battery charger terminates, it will remain off drawing only microamperes of current from the battery. If the portable product remains in this state long enough, the battery will eventually self discharge. To ensure that the battery is always topped off, a charge cycle will automatically begin when the battery voltage falls below VRECHRG (typically 4.1V for LTC3554/LTC3554-2/LTC3554-3 or 4V for LTC3554-1).
PAGE 17
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Battery Charger Stability Considerations The LTC3554’s battery charger contains both a constantvoltage and a constant-current control loop. The constantvoltage loop is stable without any compensation when a battery is connected with low impedance leads. Excessive lead length, however, may add enough series inductance to require a bypass capacitor of at least 1μF from BAT to GND. Furthermore, a 100μF 1210 ceramic capacitor in series with a 0.
PAGE 18
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION NTC thermistors have temperature characteristics which are indicated on resistance-temperature conversion tables. The Vishay-Dale thermistor NTHS0603N011-N1003F, used in the following examples, has a nominal value of 100k and follows the Vishay curve 1 resistance-temperature characteristic. In the explanation below, the following notation is used.
PAGE 19
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Therefore, the hot trip point is set when: R NTC|HOT R NOM +R NTC|HOT • VBUS = 0.35 • VBUS and the cold trip point is set when: R NTC|COLD R NOM +R NTC|COLD • V BUS = 0.76 • V BUS Solving these equations for RNTC|COLD and RNTC|HOT results in the following: RNTC|HOT = 0.538 • RNOM and RNTC|COLD = 3.17 • RNOM By setting RNOM equal to R25, the above equations result in rHOT = 0.538 and rCOLD = 3.17.
PAGE 20
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION STEP-DOWN SWITCHING REGULATOR drops below the VOUT UVLO threshold. If driving the stepdown switching regulator input supplies from a voltage other than VOUT, the regulators should not be operated outside their specified operating voltage range as operation is not guaranteed beyond this range. Introduction The LTC3554 includes two constant-frequency currentmode 200mA step-down switching regulators, also known as buck regulators.
PAGE 21
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION PGOOD Operation The PGOOD pin is an open-drain output which indicates that all enabled step-down switching regulators have reached their final regulation voltage. It goes high-impedance 230ms after all enabled switching regulators reach 92% of their regulation value. The delay allows ample time for an external processor to reset itself. PGOOD may be used as a power-on reset to a microprocessor powered by the step-down switching regulators.
PAGE 22
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION In standby mode, each regulator operates hysteretically. When the FB pin voltage falls below the internal 0.8V reference, a current source from BVIN to SW turns on, delivering current through the inductor to the switching regulator output capacitor and load. When the FB pin voltage rises above the reference plus a small hysteresis voltage, that current is shut off. In this way, output regulation is maintained.
PAGE 23
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION When FSEL is low, the frequency of the switching regulators is reduced to 1.125Mhz. The slower switching frequency reduces switching losses and raises efficiency as shown in Figures 4 and 5. Switch node slew rate is also increased to minimize transition losses. As the programmed output voltage decreases, the difference in efficiency is more appreciable.
PAGE 24
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Inductor value should be chosen based on the desired output voltage. See Table 2. Table 3 shows several inductors that work well with the step-down switching regulators. These inductors offer a good compromise in current rating, DCR and physical size. Consult each manufacturer for detailed information on their entire selection of inductors. Choose an inductor with a DC current rating at least 1.
PAGE 25
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION electrical characteristics. Inductors that are very thin or have a very small volume typically have much higher core and DCR losses, and will not give the best efficiency. The choice of which style inductor to use often depends more on the price versus size, performance and any radiated EMI requirements than on what the step-down switching regulators requires to operate. PUSHBUTTON INTERFACE The inductor value also has an effect on Burst Mode operation.
PAGE 26
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION In the HR state, all supplies are disabled. The PowerPath circuitry is placed in an ultralow quiescent state to minimize battery drain. If no external charging supply is present (VBUS) then the ideal diode is shut down, disconnecting VOUT from BAT to further minimize battery drain. The ultralow power consumption in the HR state makes it ideal for shipping or long term storage, minimizing battery drain.
PAGE 27
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION press must start in the PUP1, PUP2 or PON state, but can end in any state. If a valid HRST event is present in PON, PDN2 or POFF, then the state machine will transition to the PDN1 state and subsequently transition to the HR state one second later. Debounced Pushbutton Output (PBSTAT) In the PON, PUP1, and PUP2 states, the PBSTAT open-drain output pin outputs a debounced version of the ON pushbutton signal.
PAGE 28
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION The PWR_ON inputs can be driven via a μP/μC or by one of the buck outputs through a high impedance (100kΩ typical) to keep the bucks enabled as described above. PBSTAT does not go low on initial pushbutton application for power-up, but will go low with subsequent ON pushbutton applications in the PUP1, PUP2 or PON states. period the corresponding buck(s) will be shut down.
PAGE 29
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Power-Up Via Asserting PWR_ON Pins Power-Down Via PWR_ON De-Assertion Figure 9 shows the LTC3554 powering up by driving PWR_ON1 high. For this example the pushbutton circuitry starts in the POFF or HR state with a battery connected and all bucks disabled. Once PWR_ON1 goes high, the pushbutton circuitry enters the PON state and buck1 powers up. Once buck1’s output is within 8% of its regulation voltage for 230ms, PGOOD is asserted.
PAGE 30
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Holding ON low through the one second power-down period will not cause a power-up event at end of the one second period. The ON pin must be brought high following the power-down event and then go low again to establish a valid power-up event. UVLO Minimum Off-Time Timing (Low Battery) Figure 11 assumes the battery is either missing or at a voltage below the VOUT UVLO threshold, and the application is running via external power (VBUS).
PAGE 31
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION Holding ON low through the one second power-down period will not cause a power-up event at end of the one second period. ON must be brought high following the power-down event and then go low again for 400ms to establish a valid power-up event, as shown in Figure 12. 1 BAT 0 1 VBUS VOUT1 1V/DIV 0 tON_HR 1 ON (PB) 0 0V VOUT2 0.5V/DIV 50ms 1 PBSTAT The regulators in Figure 13 are slewing up with nominal output capacitors and no-load.
PAGE 32
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 OPERATION The power dissipated by a step-down switching regulator can be estimated as follows: PD(SWx) = (BOUTx • IOUT) • (100 - Eff)/100 Where BOUTx is the programmed output voltage, IOUT is the load current and Eff is the % efficiency which can be measured or looked up on an efficiency table for the programmed output voltage.
PAGE 33
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL APPLICATION U1 20 4.35V TO 5.5V USB INPUT 15 VBUS VOUT NTC CHRG LTC3554 16 RPROG 1.87k 1 19 9 2 10 4 8 3 5 PB1 PROG BAT BVIN HPWR SW1 FB1 FSEL 17 SW2 PWR_ON2 PBSTAT ON GND FB2 + 3 CELL ALKALINE OR LITHIUM 12 C2 2.2µF 13 6 STBY PGOOD C1 10µF 14 SUSP PWR_ON1 SYSTEM LOAD 18 11 7 U2 L1 10µH C3 10pF L2 10µH C5 10pF 2.5V RUP1 1M I/O C4 10µF RLO1 464k 1.
PAGE 34
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UD Package UD Package 20-Lead Plastic QFN (3mm × 3mm) 20-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1720 Rev A) (Reference LTC DWG # 05-08-1720 Rev A) 0.70 ±0.05 3.50 ± 0.05 (4 SIDES) 1.65 ± 0.05 2.10 ± 0.05 PACKAGE OUTLINE 0.20 ±0.05 0.
PAGE 35
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 REVISION HISTORY REV DATE DESCRIPTION A 7/10 PD package information removed and UD package information added to data sheet B 01/11 PAGE NUMBER 1 to 16 Update to Typical Application 1 LTC3554EUD added and LTC3554EPD designated Obsolete in Order Information section 2 Note 2 updated 5 Pin 21 description updated 12 Updated Related Parts 36 LTC3554-2 Option Added. Reflected throughout the data sheet 1 to 36 1 to 36 C 10/11 LTC3554-1 Option Added.
PAGE 36
LTC3554/LTC3554-1/ LTC3554-2/LTC3554-3 TYPICAL APPLICATION 4.35V TO 5.5V USB INPUT 20 C7 10µF 15 R1 100k R2 100k VBUS VOUT NTC CHRG 16 RPROG 1.87k 1 19 9 2 10 4 8 3 5 PB1 PROG BAT HPWR BVIN SW1 FSEL FB1 R3 17 + SW2 PWR_ON2 PBSTAT ON GND FB2 Li-Ion BATTERY 12 C2 2.2µF 13 L1 4.7µH C3 10pF 6 STBY PGOOD EN 14 SUSP PWR_ON1 1.8V C1 10µF LTC3554 T LDO SYSTEM LOAD 18 11 L2 10µH 7 C5 10pF 3.3V RUP1 2.05M MEMORY I/O C4 10µF RLO1 649k 1.