Datasheet

LTC3553
30
3553fb
Power-Up Sequencing
Figure 14 shows the actual power-up sequencing of the
LTC3553 with the SEQ pin held low. The regulators are
both initially disabled (0V). Once the pushbutton has been
applied (ON low) for 400ms, the buck is enabled. The buck
slews up and enters regulation. The actual slew rate is con-
trolled by the soft start function of the buck in conjunction
with output capacitance and load (see the Buck Regulator
Operation section for more information). When the buck
is within about 8% of fi nal regulation, the LDO is enabled
and slews up into regulation. The regulators in Figure 14
are slewing up with nominal output capacitors and no-
load. Adding a load or increasing output capacitance on
any of the outputs will reduce the slew rate and lengthen
the time it takes the regulator to achieve regulation.
Figure 15 shows how the regulator start-up sequence is
reversed with the SEQ pin tied high.
LAYOUT AND THERMAL CONSIDERATIONS
Printed Circuit Board Power Dissipation
In order to be able to deliver maximum charge current
under all conditions, it is critical that the Exposed Pad
on the backside of the LTC3553 package is soldered
to a ground plane on the board. Correctly soldered to a
2500mm
2
ground plane on a double-sided 1oz copper
board, the LTC3553 has a thermal resistance (θ
JA
) of
approximately 70°C/W. Failure to make good thermal
contact between the Exposed Pad on the backside of the
package and an adequately sized ground plane will result
in thermal resistances far greater than 70°C/W.
The conditions that cause the LTC3553 to reduce charge
current due to the thermal protection feedback can be
approximated by considering the power dissipated in the
part. For high charge currents the LTC3553 power dis-
sipation is approximately:
P
D
= (V
BUS
–BAT) • I
BAT
+ P
D(REGS)
where P
D
is the total power dissipated, V
BUS
is the supply
voltage, BAT is the battery voltage, and I
BAT
is the battery
charge current. P
D(REGS)
is the sum of power dissipated
on chip by the step-down switching regulators.
The power dissipated by the buck regulator can be esti-
mated as follows:
P
D(BUCK)
= (B
OUTx
• I
OUT
) • (100 - Eff)/100
Where B
OUTx
is the programmed output voltage, I
OUT
is
the load current and Eff is the % effi ciency which can
be measured or looked up on an effi ciency table for the
programmed output voltage.
The power dissipated by the LDO regulator can be esti-
mated using:
P
D(LDO)
= (V
INLDO
– V
LDO
) • I
LDO
OPERATION
Figure 14. Power-Up Sequencing with SEQ Low,
Front Page Application Circuit
Figure 15. Power-Up Sequencing with SEQ High,
Front Page Application Circuit
BUCK OUTPUT
0.5V/DIV
LDO OUTPUT
1V/DIV
0V
0V
3553 F14
100µs/DIV
BUCK OUTPUT
0.5V/DIV
LDO OUTPUT
1V/DIV
0V
0V
3553 F15
100µs/DIV