LTC3553 Micropower USB Power Manager With Li-Ion Charger, LDO and Buck Regulator DESCRIPTION FEATURES n n n n n n n n n n The LTC®3553 is a micropower, highly integrated power management and battery charger IC for single-cell Li-Ion/Polymer battery applications. It includes a PowerPath manager with automatic load prioritization, a battery charger, an ideal diode and numerous internal protection features.
LTC3553 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Notes 1, 2, 3) VBUS, VOUT t < 1ms and Duty Cycle < 1% .................. –0.3V to 7V Steady State............................................. –0.3V to 6V BAT, NTC, CHRG, SUSP, PBSTAT, ON, BUCK_FB, LDO_FB................................ –0.3V to 6V BUCK_ON, LDO_ON, STBY, SEQ, HPWR, BVIN, VINLDO, LDO (Note 4) .............–0.3V to VCC + 0.3V IBAT .............................................................................1A ISW (Continuous) ............
LTC3553 POWER MANAGER ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 2), VBUS = 5V, VBAT = 3.8V, HPWR = SUSP = BUCK_ON = LDO_ON = 0V, RPROG = 1.87k, STBY = high, unless otherwise noted. SYMBOL PARAMETER CONDITIONS TYP MAX IBVINQ BVIN Input Current Buck Shutdown Buck Enabled, Standby Mode Buck Enabled VBUS = 0V, VBVIN = 3.8V, ISW = 0 (Note 8) BUCK_ON = 0V BUCK_ON = STBY = 3.8V BUCK_ON = 3.
LTC3553 POWER MANAGER ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 2), VBUS = 5V, VBAT = 3.8V, HPWR = SUSP = BUCK_ON = LDO_ON = 0V, RPROG = 1.87k, STBY = high, unless otherwise noted.
LTC3553 LDO REGULATOR ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 2). LDO_ON = VOUT = VINLDO = 3.8V, STBY = 0V, unless otherwise noted.
LTC3553 PUSHBUTTON INTERFACE ELECTRICAL CHARACTERISTICS The l denotes specifications that apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VBAT = 3.8V, unless otherwise noted.
LTC3553 TYPICAL PERFORMANCE CHARACTERISTICS 400 VBUS Supply Current vs Temperature (Suspend Mode) 25 VBUS = 5V HPWR = L 18 20 IBUS (μA) IBUS (μA) 250 VBAT = 3.8V 16 STBY = 3.8V REGULATORS LOAD = 0mA 14 BUCK AND LDO ON 12 VBUS = 5V 350 300 Battery Drain Current vs Temperature BATTERY DRAIN CURRENT (μA) VBUS Supply Current vs Temperature TA = 25°C, unless otherwise specified.
LTC3553 TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise specified. Battery Regulation (Float) Voltage vs Temperature Battery Charge Current vs Battery Voltage VFLOAT Load Regulation 4.204 4.250 VBUS = 5V HPWR = H 500 VBUS = 5V IBAT = 2mA 4.202 400 4.225 VBUS = 5V HPWR = H RPROG = 1.87k 4.198 IBAT (mA) VFLOAT (V) VFLOAT (V) 4.200 4.200 300 200 4.196 4.175 100 4.194 4.192 0 50 100 150 200 250 300 350 400 450 IBAT (mA) 4.
LTC3553 TYPICAL PERFORMANCE CHARACTERISTICS Buck Switching Regulator 2.5V Output Efficiency vs Load Buck Regulator 3.3V Output Efficiency vs Load 100 100 STBY = L 100 STBY = L 90 80 80 80 70 70 70 60 50 40 60 50 40 30 30 20 20 3.8V 5V 0.1 1 10 BUCK LOAD (mA) 100 0 0.01 0.1 1 10 BUCK LOAD (mA) 100 35 STBY = L 90 30 BVIN SUPPLY CURRENT (μA) EFFICIENCY (%) 80 70 60 50 40 30 20 100 –45°C 25°C 90°C NO LOAD STBY = L 25 20 15 10 0 2.5 1000 3.0 3 3.5 4 4.
LTC3553 TYPICAL PERFORMANCE CHARACTERISTICS 0.820 BVIN = 3.2V STBY = L 3.8V 5V STBY = L 0.815 PMOS 1.2 FEEDBACK VOLTAGE (V) SWITCH IMPEDANCE (Ω) 1.4 Power-Up Sequencing with SEQ Low Buck Regulator Feedback Voltage vs Output Current Buck Regulator Switch Impedance vs Temperature 1.6 TA = 25°C, unless otherwise specified. 1.0 NMOS 0.8 0.6 0.4 BUCK OUTPUT 0.5V/DIV 0.810 0.805 0V 0.800 LDO OUTPUT 1V/DIV 0.795 0V 0.790 0.785 0.2 0 –75 –50 –25 FRONT PAGE APPLICATION CIRCUIT 0.780 0.
LTC3553 TYPICAL PERFORMANCE CHARACTERISTICS LDO Dropout Voltage at VINLDO = 3.8V LDO Dropout Voltage at VINLDO = 2.5V LDO Dropout Voltage at VINLDO = 1.8V 300 300 200 150 100 50 0 –45°C 25°C 90°C 250 LDO DROPOUT VOLTAGE (mV) –45°C 25°C 90°C LDO DROPOUT VOLTAGE (mV) LDO DROPOUT VOLTAGE (mV) 300 250 TA = 25°C, unless otherwise specified. 200 150 100 50 25 50 75 100 LDO LOAD (mA) 125 150 0 25 50 75 100 LDO LOAD (mA) 3553 G37 VOUT 50mV/DIV (AC) LDO (3.3V) 50mV/DIV (AC) LDO (3.
LTC3553 PIN FUNCTIONS HPWR (Pin 1): High Power Logic Input. When this pin is low the input current limit is set to 100mA and when this pin is driven high it is set to 500mA. The SUSP pin needs to be low for the input current limit circuit to be enabled. This pin has a conditional internal pull-down resistor when power is applied to the VBUS pin. LDO_FB (Pin 9): Feedback Input for the Low Dropout Regulator. This pin servos to a fixed voltage of 0.8V when the control loop is complete.
LTC3553 PIN FUNCTIONS BAT (Pin 17): Single-Cell Li-Ion Battery Pin. Depending on available power and load, a Li-Ion battery on BAT will either deliver system power to VOUT through the ideal diode or be charged from the battery charger. VOUT (Pin 18): Output Voltage of the PowerPath Controller and Input Voltage of the Battery Charger. The majority of the portable products should be powered from VOUT.
LTC3553 BLOCK DIAGRAM 18 VOUT VBUS 20 HPWR INPUT CURRENT LIMIT 1 SUSP 19 CC/CV CHARGER 17 BAT 16 PROG EXTPWR UVLO 12 BVIN NTC 15 BATTERY TEMP MONITOR 1.125MHz OSCILLATOR OSC 0.8V CHRG 14 ÷ 2048 CHARGE STATUS 13 SW EN STBY 8 BUCK_FB 200mA BUCK DC/DC 11 VINLDO 0.
LTC3553 OPERATION Introduction The LTC3553 is a highly integrated power management IC that includes the following features: The buck regulator operates at 1.125MHz. Both regulators include a low power standby mode which can be used to power essential keep-alive circuitry while draining ultralow current from the battery for extended battery life.
LTC3553 OPERATION MOSFET whenever the voltage at VOUT is approximately 15mV (VFWD) below the voltage at BAT. The resistance of the internal ideal diode is approximately 240mΩ. Suspend Mode When the SUSP pin is pulled high the LTC3553 enters suspend mode to comply with the USB specification. In this mode, the power path between VBUS and VOUT is put in a high impedance state to reduce the VBUS input current to 15μA. The system load connected to VOUT is supplied through the ideal diode connected to BAT.
LTC3553 OPERATION In either the constant-current or constant-voltage charging modes, the PROG pin voltage will be proportional to the actual charge current delivered to the battery. Therefore, the actual charge current can be determined at any time by monitoring the PROG pin voltage and using the following equation: to excess load on the VOUT pin. This prevents false end of charge indications due to insufficient power available to the battery charger.
LTC3553 OPERATION NTC Thermistor Alternate NTC Thermistors and Biasing The battery temperature is measured by placing a negative temperature coefficient (NTC) thermistor close to the battery pack. To use this feature connect the NTC thermistor, RNTC, between the NTC pin and ground and a bias resistor, RNOM, from VBUS to NTC, as shown in Figure 1. RNOM should be a 1% resistor with a value equal to the value of the chosen NTC thermistor at 25°C (R25).
LTC3553 OPERATION 20 VBUS 0.76 • VBUS (NTC RISING) RNOM 105k – TOO_COLD 15 NTC + R1 12.7k RNTC 100k TOO_HOT + + NTC_ENABLE 0.017 • VBUS (NTC FALLING) r HOT • R25 0.538 r R NOM = COLD • R25 3.17 where rHOT and rCOLD are the resistance ratios at the desired hot and cold trip points. Note that these equations are linked. Therefore, only one of the two trip points can be independently set, the other is determined by the default ratios designed in the IC. R NOM = – 0.
LTC3553 OPERATION BUCK REGULATOR Introduction The LTC3553 includes a constant-frequency currentmode 200mA buck regulator. At light loads, the regulator automatically enters Burst Mode operation to maintain high efficiency. Applications with a near-zero-current sleep or memory keep-alive mode can command the LTC3553 buck regulator into a standby mode that maintains output regulation while drawing only 1.5μA quiescent current. Load capability drops to 10mA in this mode.
LTC3553 OPERATION the power switches enough times to charge the output capacitor to a voltage slightly higher than the regulation point. The buck then goes into a reduced quiescent current sleep mode. In this state, power loss is minimized while the load current is supplied by the output capacitor. Whenever the output voltage drops below a predetermined value, the buck wakes from sleep and cycles the switches again until the output capacitor voltage is once again slightly above the regulation point.
LTC3553 OPERATION Inductor value should be chosen based on the desired output voltage. See Table 1. Table 3 shows several inductors that work well with the step-down switching buck regulator. These inductors offer a good compromise in current rating, DCR and physical size. Consult each manufacturer for detailed information on their entire selection of inductors. Larger value inductors reduce ripple current, which improves output ripple voltage.
LTC3553 OPERATION The switching regulator input supply should be bypassed with a 2.2μF capacitor. Consult with capacitor manufacturers for detailed information on their selection and specifications of ceramic capacitors. Many manufacturers now offer very thin (<1mm tall) ceramic capacitors ideal for use in height-restricted designs. Table 2 shows a list of several ceramic capacitor manufacturers. Output Voltage Programming Figure 4 shows the LDO regulator application circuit.
LTC3553 OPERATION regulator, the LDO’s load capability remains unchanged. However, the LDO’s transient response is slowed, as illustrated in Figure 5 and Figure 6. measures should be taken to ensure that the buck is not operated outside the specified BVIN input supply range, as operation beyond this range is not guaranteed. LDO Regulator UVLO Considerations The LDO regulator’s bias current is supplied via an internal connection to the USB PowerPath VOUT pin.
LTC3553 OPERATION after entering the PDN1 state the pushbutton circuitry will transition into the hard reset (HR) state. In the HR state, all supplies are disabled. The PowerPath circuitry is placed in an ultralow quiescent state to minimize battery drain. If no external charging supply is present (VBUS) then the ideal diode is shut down, disconnecting VOUT from BAT to further minimize battery drain.
LTC3553 OPERATION PBSTAT to go low. PBSTAT goes high impedance when ON goes high, except the logic enforces a minimum pulse width of 50ms on PBSTAT. In the HR, POFF, PDN1, and PDN2 states, PBSTAT remains high impedance regardless of the state of ON. Power-Up Via Pushbutton Press Figure 8 shows the LTC3553 powering up through application of the external pushbutton. For this example the pushbutton circuitry starts in the POFF or HR state with a battery connected and both regulators disabled.
LTC3553 OPERATION BUCK_ON or LDO_ON is low or goes low after the five second period the corresponding regulator(s) will be shut down. In the above example both pins are high at the end of the five second period and therefore both regulators continue to stay on at the end of the five second period. The BUCK_ON and LDO_ON inputs can be driven via a μP/μC or one of the regulator outputs through a high impedance (100kΩ typ) to keep the regulators enabled as described above.
LTC3553 OPERATION Power-Down by De-Asserting Both BUCK_ON and LDO_ON with a valid external supply (VBUS) with or without a battery present. Figure 11 shows the LTC3553 powering down by μC/μP control. For this example the pushbutton circuitry starts in the PON state with a battery connected and both regulators enabled. The user presses the pushbutton (ON low) for at least 50ms, which generates a debounced, low impedance pulse on the PBSTAT output.
LTC3553 OPERATION In the typical case where the BUCK_ON and LDO_ON pins are driven by logic powered by the regulators, the BUCK_ON and LDO_ON pins would also go low, as depicted in Figure 12. If the external supply recovers after entering the PDN2 state such that VOUT is no longer in UVLO, then the LTC3553 will transition back into the PUP2 state once the PDN2 one second delay is complete.
LTC3553 OPERATION Power-Up Sequencing approximately 70°C/W. Failure to make good thermal contact between the Exposed Pad on the backside of the package and an adequately sized ground plane will result in thermal resistances far greater than 70°C/W. Figure 14 shows the actual power-up sequencing of the LTC3553 with the SEQ pin held low. The regulators are both initially disabled (0V). Once the pushbutton has been applied (ON low) for 400ms, the buck is enabled. The buck slews up and enters regulation.
LTC3553 OPERATION where VINLDO is the LDO input supply voltage, VLDO is the LDO regulated output voltage, and ILDO is the LDO load current. Thus the power dissipated by all regulators is: PD(REGS) = PD(BUCK) + PD(LDO) It is not necessary to perform any worst-case power dissipation scenarios because the LTC3553 will automatically reduce the charge current to maintain the die temperature at approximately 110°C.
LTC3553 TYPICAL APPLICATIONS USB PowerPath With Li-Ion Battery (NTC Qualified Charging) 4.35V TO 5.5V USB INPUT 20 C3 10μF 15 R1 100k R2 100k VOUT VBUS CHRG NTC 16 PROG 19 5 R3 BAT 2 HPWR BVIN SUSP VINLDO LDO LDO_ON 17 + 7 3 4 PB1 C2 2.2μF 11 10 3.3V RUP1 2.05M 9 STBY SW BUCK_ON 13 PBSTAT ON BUCK_FB GND Li-Ion BATTERY 12 SEQ LDO_FB 6 EN 14 RPROG 1.87k 1 1.8V C1 10μF LTC3553 T LDO SYSTEM LOAD 18 8 L1 10μH C5 10pF MEMORY I/O C4 4.7μF RLO1 649k 1.
LTC3553 TYPICAL APPLICATIONS 3-Cell Alkaline/Lithium With PowerPath (Charger Disabled) U1 4.35V TO 5.5V USB INPUT 20 C3 10μF 15 VBUS VOUT NTC CHRG LTC3553 16 BAT SYSTEM LOAD 18 C1 10μF 14 17 + PROG 3 CELL ALKALINE OR LITHIUM RPROG 1.87k 1 19 5 2 HPWR BVIN SUSP VINLDO LDO_ON LDO 7 3 4 PB1 C2 2.2μF 11 10 RUP1 1M 9 STBY BUCK_ON SW 13 PBSTAT ON BUCK_FB 8 U2 2.5V SEQ LDO_FB 6 12 L1 10μH C5 10pF I/O C4 4.7μF RLO1 464k 1.
LTC3553 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. UD Package 20-Lead Plastic QFN (3mm × 3mm) (Reference LTC DWG # 05-08-1720 Rev A) 0.70 ±0.05 3.50 ± 0.05 (4 SIDES) 1.65 ± 0.05 2.10 ± 0.05 PACKAGE OUTLINE 0.20 ±0.05 0.40 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 3.00 ± 0.10 (4 SIDES) BOTTOM VIEW—EXPOSED PAD R = 0.115 TYP 0.75 ± 0.05 R = 0.
LTC3553 REVISION HISTORY REV DATE DESCRIPTION A 9/10 PD package information removed and UD package information added to data sheet B 1/12 PAGE NUMBER 1 to 16 LTC3553EUD added and LTC3553EPD designated Obsolete in Order Information section 2 Note 2 updated 6 Pin 21 description updated 13 Updated Related Parts 36 Updated the Block Diagram 14 Updated State Diagram/Operation section 24 3553fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
LTC3553 TYPICAL APPLICATION USB PowerPath With Li-Ion Battery (NTC Qualified Charging), and LDO Regulator Driven by Buck Regulator 4.35V TO 5.5V USB INPUT 20 C7 10μF R1 100k R2 100k 15 VBUS VOUT NTC CHRG 18 16 1 R3 PROG BAT 7 2 HPWR BVIN 17 + SW BUCK_ON VINLDO 5 3 4 PB1 C2 2.2μF 13 L1 4.7μH SEQ STBY 8 11 LDO 10 ON LDO_FB C3 10pF 3.3V RUP1 2.05M MEMORY I/O C4 10μF RLO1 649k C5 2.2μF LDO_ON PBSTAT Li-Ion BATTERY 12 SUSP BUCK_FB 6 EN 14 RPROG 1.87k 19 1.
