Datasheet

LTC3544
11
3544fa
voltage, the output ripple is highest at maximum input
voltage since ΔI
L
increases with input voltage.
Using Ceramic Input and Output Capacitors
Higher value, lower cost, ceramic capacitors are now
widely available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them
ideal for switching regulator applications. Because the
LTC3544’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
However, care must be taken when ceramic capacitors
are used at the input and the output. When a ceramic
capacitor is used at the input and the power is supplied
by a wall adapter through long wires, a load step at the
output can induce ringing at the input, V
IN
. At best, this
ringing can couple to the output and be mistaken as loop
instability. At worst, a sudden inrush of current through
the long wires can potentially cause a voltage spike at V
IN
,
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Output Voltage Programming
The output voltage is set by tying V
FB
to a resistive divider
according to the following formula:
VV
R
R
OUT
=+
⎛
⎝
⎜
⎞
⎠
⎟
08 1
2
1
.
The external resistive divider is connected to the output
allowing remote voltage sensing as shown in Figure 2.
Keeping the current in the resistors small maximizes the
effi ciency, but making them too small may allow stray
capacitance to cause noise problems or reduce the phase
margin of the control loop. It is recommended that the
total feedback resistor string be kept to under 100k.
To improve the frequency response of the control loop, a
feed forward capacitor, C
F
, may be used. Great care should
be taken to route the feedback line away from noise sources
such as the inductor of the SW line.
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the effi ciency and which change would produce
the most improvement. Effi ciency can be expressed as:
Effi ciency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc.
are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3544 circuits: V
IN
quiescent current and I
2
R
losses. V
IN
quiescent current loss dominates the effi ciency
loss at low load currents, whereas the I
2
R loss dominates
the effi ciency loss at medium to high load currents.
1. The quiescent current is due to two components: the
DC bias current as given in the electrical characteristics
and the internal main switch and synchronous switch
gate charge currents. The gate charge current results
from switching the gate capacitance of the internal
power MOSFET switches. Each time the gate is switched
from high to low to high again, a packet of charge, dQ,
moves from PV
IN
to ground. The resulting dQ/dt is the
current out of PV
IN
that is typically larger than the DC
bias current and proportional to frequency. Both the
DC bias and gate charge losses are proportional to
PV
IN
and thus their effects will be more pronounced
at higher supply voltages.
2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
, and external inductor R
L
. In
continuous mode, the average output current fl owing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
APPLICATIONS INFORMATION
V
FB
GND
LTC3544
0.8V ≤ V
OUT
≤ 5.5V
R2 C
F
R1
3544 F02
Figure 2. Setting the LTC3544 Output Voltage