Datasheet

LTC3542
10
3542fa
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
VV
R
R
OUT
=+
⎛
⎝
⎜
⎞
⎠
⎟
06 1
2
1
.
To improve the frequency response, a feed-forward capaci-
tor, C
F
, may also be used. Great care should be taken to
route the V
FB
line away from noise sources, such as the
inductor or the SW line.
Mode Selection and Frequency Synchronization
The MODE/SYNC pin is a multipurpose pin that provides
mode selection and frequency synchronization. Connect-
ing this pin to GND enables Burst Mode operation, which
provides the best low current effi ciency at the cost of a
higher output voltage ripple. Connecting this pin to V
IN
selects pulse skip mode operation, which provides the
lowest output ripple at the cost of low current effi ciency.
The LTC3542 can also be synchronized to an external clock
signal with range from 1MHz to 3MHz by the MODE/SYNC
pin. During synchronization, the mode is set to pulse skip
and the top switch turn-on is synchronized to the falling
edge of the external clock.
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the effi ciency and which change would produce
the most improvement. Effi ciency can be expressed as:
Effi ciency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, three main sources usually account for most of
the losses in LTC3542 circuits: 1) V
IN
quiescent current,
2) I
2
R loss and 3) switching loss. V
IN
quiescent current
loss dominates the power loss at very low load currents,
whereas the other two dominate at medium to high load
currents. In a typical effi ciency plot, the effi ciency curve
at very low load currents can be misleading since the
actual power loss is of no consequence as illustrated in
Figure 2.
1) The V
IN
quiescent current is the DC supply current given
in the Electrical Characteristics which excludes MOSFET
charging current. V
IN
current results in a small (<0.1%)
loss that increases with V
IN
, even at no load.
2) I
2
R losses are calculated from the DC resistances of
the internal switches, R
SW
, and external inductor, R
L
. In
continuous mode, the average output current fl ows through
inductor L, but is “chopped” between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
R
DS(ON)
and the duty cycle (D) as follows:
R
SW
= (R
DS(ON)TOP
)(D) + (R
DS(ON)BOT
)(1 – D)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
2
R losses:
I
2
R losses = I
OUT
2
(R
SW
+ R
L
)
Figure 2. Power Loss vs Load Current
OUTPUT CURRENT (mA)
1
POWER LOSS (mW)
10
100
1000
0.1 10 100 1000
3542 F02
0.1
1
V
OUT
= 2.5V
V
OUT
= 1.8V
V
OUT
= 1.2V
V
IN
= 3.6V
Burst Mode OPERATION
APPLICATIONS INFORMATION