Datasheet

LTC3538
7
3538fb
BLOCK DIAGRAM
GATE DRIVERS
AND
ANTICROSS
CONDUCTION
0.5A
C
1V
B
SW2SW1
D
L1
ANTI-RING
A
PWM LOGIC
AND
OUTPUT PHASING
INTERNAL
SOFT-START
THERMAL
SHUTDOWN
OSC
1MHz
5μs
DELAY
BURST
MODE
CONTROL
TSD
UVLO
REVERSE
CURRENT
LIMIT
AVERAGE
CURRENT LIMIT
PEAK
CURRENT LIMIT
PWM
COMPARATORS
UVLO
2A
C
IN
V
IN
2.4V TO 5.5V
3.5A
2.3V
C
P1
SOFT-START
C
Z1
R
Z
R2
R1
C
P2
C
OUT
V
OUT
V
OUT
V
IN
3538 BD
+
–
+
–
+
–
SLEEP
SS DONE
FB
+
–
+
–
–
+
+
–
7
8
6
5
FB
1
V
C
2
BURST
GND
1 = BurstMode OPERATION
0 = FIXED FREQUENCY
BURST
4
3
+
OFF ON