Datasheet

LTC3533
13
3533f
APPLICATIONS INFORMATION
Closing the Feedback Loop
The LTC3533 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(buck, boost, buck/boost), but is usually no greater than
15. The output fi lter exhibits a double pole response, as
given by:
f
LC
Hz
in buck e
f
FILTER POLE
OUT
F
_
•• •
( mod )
=
1
2 π
IILTER POLE
IN
OUT OUT
V
VLC
Hz
in boost
_
••••
(
=
2 π
mmod )e
where L is in Henries and C
OUT
is in Farads.
The output fi lter zero is given by:
f
RC
Hz
FILTER ZERO
ESR OUT
_
•• •
=
1
2 π
where R
ESR
is the equivalent series resistance of the
output capacitor.
A troublesome feature in boost mode is the right-half plane
zero (RHP), given by:
f
V
ILV
Hz
RHPZ
IN
OUT OUT
•• ••
=
2
2 π
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorporated
to stabilize the loop, but at a cost of reduced bandwidth
and slower transient response. To ensure proper phase
margin using Type I compensation, the loop must be
crossed over a decade before the LC double pole. Referring
to Figure 5, the unity-gain frequency of the error amplifi er
with the Type I compensation is given by:
f
RC
Hz
UG
P
•• •
=
1
21
1
π
Most applications demand an improved transient response
to allow a smaller output fi lter capacitor. To achieve a higher
bandwidth, Type III compensation is required, providing
two zeros to compensate for the double-pole response of
the output fi lter. Referring to Figure 6, the location of the
poles and zeros are given by:
f
eRC
Hz
which is a
POLE
P
1
3
1
1
210 1•• • •
(
=
π
very
llow frequency)
•• •
f
RC
Hz
f
ZERO
ZP
ZERO
1
1
2
1
2
=
π
==
=
1
21
1
2
1
2
2
•• •
•• •
π
π
RC
Hz
f
RC
Hz
Z
POLE
ZP
where resistance is in Ohms and capacitance is in Farads.
1.22V
R1
R2
3533 F05
FB
12
V
C
C
P1
V
OUT
11
–
+
ERROR
AMP
1.22V
R1
R2
3533 F06
FB
12
V
C
C
P1
C
Z1
R
Z
V
OUT
11
C
P2
–
+
ERROR
AMP
Figure 5. Error Amplifi er with Type I Compensation Figure 6. Error Amplifi er with Type III Compensation