Datasheet

LTC3531/
LTC3531-3.3/LTC3531-3
7
3531fa
PI FU CTIO S
UUU
ThinSOT/DFN Packages
SW2 (Pin 1/Pin 7): Buck-Boost Switch Pin Where Internal
Switches C and D are Connected. An optional Schottky
diode can be connected from SW2 to V
OUT
for a moderate
effi ciency improvement. Minimize trace length to keep
EMI down.
GND (Pin 2/Pin 3): Signal Ground for the IC.
PGND (Pin 2/Pin 8): Power Ground for the IC. (Shared
on ThinSOT version)
V
OUT
(Pin 3/Pin 6): Output of the Buck-Boost Synchronous
Rectifi er. A fi lter capacitor is placed from V
OUT
to GND.
A ceramic bypass capacitor is recommended as close to
the V
OUT
and GND pins as possible.
SHDN (Pin 4/Pin 4): External Shutdown Pin. An applied
voltage of < 0.4V shuts down the converter. A voltage
above >1.4V will enable the converter.
V
IN
(Pin 5/Pin 2): Input Supply Pin for the Buck-Boost
Converter. A minimum 2.2µF Ceramic Capacitor should
be placed between V
IN
and GND.
FB (NA/Pin 5): Feedback Pin for the Adjustable Version.
Connect the resistor divider tap here. The output voltage
can be adjusted from 2V to 5V.
V
R
R
OUT
=+
⎛
⎝
⎜
⎞
⎠
⎟
12251
2
1
.
SW1 (Pin 6/Pin 1): Buck-Boost Switch Pin Where Internal
Switches A and B are Connected. Connect the inductor
from SW1 to SW2.
Exposed Pad (Pin 9, DFN): Solder to PCB ground for
optimal thermal performance.