Datasheet

LTC3528/LTC3528B
7
3528fd
BLOCK DIAGRAM
8
Σ
+
–
+
–
GATE DRIVERS
AND
ANTI-CROSS
CONDUCTION
LOGIC
CLK
UVLO
PK
PK
COMP
SLOPE
COMP
I
ZERO
COMP
ERROR AMP
SLEEP COMP
I
ZERO
WAKE
EXPOSED
PAD
+
–
WELL
SWITCH
MODE
CONTROL
(LTC3528)
UVLO
V
REF
V
REF
4M
SHDN
V
BEST
START-UP
1MHz
OSC
TSD
THERMAL
SHUTDOWN
SHUTDOWN
ANTI-RING
V
SEL
V
IN
5
4
SW
V
OUT
L1
4.7µH
V
B
SHUTDOWN
CLAMP
BURST
SOFT-START
V
REF
+
–
V
REF
– 10%
FB
FB
V
OUT
2
9
SGND
3528 BD
7
PGND
6
FB
R2
C
OUT
10µF
V
OUT
1.6V
TO 5.25V
R1
1
PGOOD
3
C
IN
4.7µF
V
IN
0.7V
TO 5V
SGND (Pin 7): Signal Ground. Provide a short direct PCB
path between SGND and the (–) side of the input and
output capacitors.
V
IN
(Pin 8): Battery Input Voltage. Connect a minimum of
1µF ceramic decoupling capacitor from this pin to ground.
GND (Exposed Pad Pin 9): The exposed pad must be
soldered to the PCB ground plane. It serves as another
ground connection and as a means of conducting heat
away from the die.
PIN FUNCTIONS