Datasheet

LTC3447
6
3447f
SW (Pin 6): Switch Node Connector to Inductor. This pin
connects the drains of the internal main and synchronous
power MOSFET switches.
RUN (Pin 7): Run Control Input. Forcing pin above 1.5V
enables the part. Forcing the pin below 0.3V shuts down
the device. In shutdown, all functions are disabled draw-
ing <1µA of supply current. Do not leave the RUN pin
fl oating.
SCL (Pin 8): I
2
C Clock Input.
V
CCD
(Pin 9): I
2
C Power Rail.
SDA (Pin 10): I
2
C Data Input.
Exposed Pad (Pin 11): Ground. Must be connected to
PCB ground for electrical contact and optimized thermal
performance.
V
OUT
(Pin 1): Output Voltage Sensing Pin. An internal
resistor divider provides the divided down feedback refer-
ence for comparison.
GND (Pin 2): Ground for all Circuits Excluding the Internal
Synchronous Power NFET.
FB (Pin 3): Feedback Sensing Pin for the Optional External
Feedback Resistors. Must be tied to V
IN
if there are no
external feedback resistors.
PGOOD (Pin 4): Fault Report. Open drain driver sinks cur-
rent when V
OUT
is 10% out of tolerance. Blanking during
DAC changes can be enabled via the I
2
C.
V
IN
(Pin 5): Main Supply Pin. Must be closely decoupled
to GND with a 2.2µF or greater capacitor.
PI FU CTIO S
UUU
Figure 2. LTC3447 High Level Block Diagram
BLOCK DIAGRA
W
–
+
SLEW
SOFT-START
MUX
BUCK
REGULATOR
SW
FB
SW
V
FB
V
REF
BURST
BURST
REF
UV REF
OV REF
POWER
GOOD
DAC
V
DAC
LOAD
6-BIT DAC
I
2
C
BLANK
MUX
DAC
R
1.3R
R1
R2
V
IN
RUN
V
CCD
SDA
SCL
PGOOD
LTC3447
S
3447 BD
C
IN
V
OUT
C
OUT