Datasheet

LTC3441
6
3441fa
BLOCK DIAGRA
W
–
+
–
+
–
+
–
+
–
+
–
+
9
10
PWM
LOGIC
AND
OUTPUT
PHASING
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
Burst Mode
OPERATION
CONTROL
5μs DELAY
GND
UVLO
4A
2.4V
SLEEP
MODE/SYNC
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
1MHz
OSC
SYNC
SUPPLY
CURRENT
LIMIT
SW A
SW1
PV
IN
V
IN
V
CC
INTERNAL
SW2
V
IN
2.4V TO 5.5V
SW D
I
SENSE
AMP
ERROR
AMP
1.22V
CLAMP
REVERSE
CURRENT
LIMIT
SW B
3.2A
AVERAGE
CURRENT LIMIT
SW C
PGND
–0.8A
7
2
1
+
4 5
PGND
6
V
OUT
8
FB
12
V
C
11
SHDN/SS
SHUTDOWN
R
SS
V
IN
R2
C
SS
R1
3440 BD
V
OUT
2.4V TO 5.25V
PWM
COMPARATORS
–
+
1
100
g
m
= k
THERMAL
SHUTDOWN
÷2