Datasheet

LTC3441
11
3441fa
Input Capacitor Selection
Since the V
IN
pin is the supply voltage for the IC it is
recommended to place at least a 4.7μF, low ESR bypass
capacitor.
Table 2. Capacitor Vendor Information
SUPPLIER PHONE FAX WEB SITE
AVX [phone] [phone] www.avxcorp.com
Sanyo [phone] [phone] www.sanyovideo.com
Taiyo Yuden [phone] [phone] www.t-yuden.com
Optional Schottky Diodes
The Schottky diodes across the synchronous switches B
and D are not required (V
OUT
< 4.3V), but provide a lower
drop during the break-before-make time (typically 15ns)
of the NMOS to PMOS transition, improving efficiency.
Use a Schottky diode such as an MBRM120T3 or equiva-
lent. Do not use ordinary rectifier diodes, since the slow
recovery times will compromise efficiency. For applica-
tions with an output voltage above 4.3V, a Schottky diode
is required from SW2 to V
OUT
.
Output Voltage < 2.4V
The LTC3441 can operate as a buck converter with output
voltages as low as 0.4V. The part is specified at 2.4V
minimum to allow operation without the requirement of a
Schottky diode. Synchronous switch D is powered from
V
OUT
and the R
DS(ON)
will increase at low output voltages,
therefore a Schottky diode is required from SW2 to V
OUT
to provide the conduction path to the output.
Output Voltage > 4.3V
A Schottky diode from SW to V
OUT
is required for output
voltages over 4.3V. The diode must be located as close to
the pins as possible in order to reduce the peak voltage on
SW2 due to the parasitic lead and trace inductance.
Input Voltage > 4.5V
For applications with input voltages above 4.5V which
could exhibit an overload or short-circuit condition, a
2Ω/1nF series snubber is required between the SW1 pin
and GND. A Schottky diode from SW1 to V
IN
should also
be added as close to the pins as possible. For the higher
input voltages, V
IN
bypassing becomes more critical;
therefore, a ceramic bypass capacitor as close to the V
IN
and GND pins as possible is also required.
Operating Frequency Selection
Additional quiescent current due to the output switches
GATE charge is given by:
Buck: 800e
–12
• V
IN
• f
Boost: 400e
–12
• (V
IN
+ V
OUT
) • f
Buck/Boost: f • (1200e
–12
• V
IN
+ 400e
–12
• V
OUT
)
where f = switching frequency
Closing the Feedback Loop
The LTC3441 incorporates voltage mode PWM control.
The control to output gain varies with operation region
(Buck, Boost, Buck/Boost), but is usually no greater than
15. The output filter exhibits a double pole response is
given by:
f
LC
Hz
FILTER POLE
OUT
_
•• •
=
π
1
2
where C
OUT
is the output filter capacitor.
The output filter zero is given by:
f
RC
Hz
FILTER ZERO
ESR OUT
_
•• •
=
π
1
2
where R
ESR
is the capacitor equivalent series resistance.
A troublesome feature in Boost mode is the right-half
plane zero (RHP), and is given by:
f
V
ILV
Hz
RHPZ
IN
OUT OUT
=
π
2
2• • • •
The loop gain is typically rolled off before the RHP zero
frequency.
A simple Type I compensation network can be incorpo-
rated to stabilize the loop but at a cost of reduced band-
width and slower transient response. To ensure proper
phase margin, the loop requires to be crossed over a
decade before the LC double pole.
APPLICATIO S I FOR ATIO
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