Datasheet

7
LTC3440
3440fb
BLOCK DIAGRA
W
–
+
–
+
–
+
–
+
–
+
–
+
7
PWM
LOGIC
AND
OUTPUT
PHASING
GATE
DRIVERS
AND
ANTICROSS
CONDUCTION
Burst Mode
OPERATION
CONTROL
5μs DELAY
GND
UVLO
2.7A
2.4V
R
T
SLEEP
MODE/SYNC
1 = Burst Mode
OPERATION
0 = FIXED FREQUENCY
R
T
OSC
SYNC
SUPPLY
CURRENT
LIMIT
SW A
SW1 SW2
V
IN
2.5V TO 5.5V
SW D
I
SENSE
AMP
ERROR
AMP
1.22V
CLAMP
REVERSE
CURRENT
LIMIT
SW B SW C
–0.4A
1
2
5
8
+
3 4
V
OUT
6
FB
9
V
C
10
SHDN/SS
SHUTDOWN
R
SS
V
IN
R2
C
SS
R1
3440 BD
V
OUT
2.5V TO 5.5V
PWM
COMPARATORS