Datasheet

LTC3422
11
3422fa
OPERATIO
U
APPLICATIO S I FOR ATIO
WUUU
the input source. It also allows for inrush current limiting
at turn-on, minimizing surge currents seen by the input
supply. Note that to obtain the advantages of output
disconnect, there must not be any external Schottky
diodes connected between the SW pin and V
OUT
.
Note: Board layout is extremely critical to minimize voltage
overshoot on SW due to stray inductance. Keep the output
filter capacitors as close as possible to V
OUT
and use very
low ESR/ESL ceramic capacitors tied to a good ground
plane.
where:
f = Operating Frequency in MHz
Ripple = Allowable Inductor Current Ripple (Amps
Peak-Peak)
V
IN(MIN)
= Minimum Input Voltage
V
OUT(MAX)
= Maximum Output Voltage
The inductor current ripple is typically set 20% to 40% of
the maximum inductor current.
For high efficiency, choose an inductor with high fre-
quency core material, such as ferrite, to reduce core
losses. The inductor should have low ESR (equivalent
series resistance) to reduce the I
2
R losses and must be
able to handle the peak inductor current without saturat-
ing. Molded chokes or chip inductors usually do not have
enough core to support peak inductor currents in the 2A
to 3A region. To minimize radiated noise, use a toroidal or
shielded inductor. See Table 1 for suggested inductor
suppliers and Table 2 for a list of capacitor suppliers.
Table 1. Inductor Vendor Information
SUPPLIER PHONE FAX WEB SITE
Coilcraft [phone] [phone] www.coilcraft.com
CoEv [phone] [phone] www.circuitprotection.
Magnetics com/magnetics.asp
Murata USA: USA: www.murata.com
[phone] [phone]
[phone]
Sumida USA: USA: www.sumida.com
[phone] [phone]
Japan: Japan:
81-3-3607-5111 81-3-3607-5144
TDK [phone] [phone] www.component.tdk.com
TOKO [phone] [phone] www.toko.com
Wurth [phone] [phone] www.we-online.com
SW
1
V
IN
V
IN
2
BURST
3
SS
4
SHDN
MULTIPLE VIAS
TO GROUND PLANE
LTC3422
V
OUT
V
OUT
SYNC
R
T
V
C
FB
3422 F01
5
10
9
8
7
6
+
Figure 1. Recommended Component Placement. Traces
Carrying High Current are Direct (GND, SW, V
IN
, V
OUT
). Trace
Area at FB and V
C
are Kept Low. Lead Length to Battery Should
be Kept Short. V
IN
and V
OUT
Ceramic Capacitors Should be as
Close to the LTC3422 Pins as Possible
COMPONENT SELECTION
Inductor Selection
The high frequency operation of the LTC3422 allows the
use of small surface mount inductors. The minimum
inductance value is proportional to the operating fre-
quency and is limited by the following constraints:
L
VV
OUT MAX IN MIN
>
()
3
ƒƒ
and L >
V
• Ripple • V
IN(MIN)
OUT(MAX)
•–
() ()
It should also be noted that the LTC3422 provides inrush
current limiting without reducing the maximum load cur-
rent capability during start-up. The internally set peak
current command of the LTC3422 is allowed to gradually
increase during the soft-start period until it reaches the
nominal maximum level.