Datasheet

LTC3421
6
3421f
PI FU CTIO S
UUU
R
T
(Pin 5): Connect a resistor to ground to program the
oscillator frequency according to the formula:
f
R
OSC
T
=
28 100,
where f
OSC
is in kHz and R
T
is in k.
SS (Pin 6): Soft-Start Pin. Connect a capacitor from this
pin to ground to set the soft-start time according to the
formula:
t(ms) = C
SS
(µF) • 320
The nominal soft-start charging current is 2.5µA. The
active range of SS is from 0.8V to 1.6V.
SYNC (Pin 7): Oscillator Synchronization Pin. A clock
pulse width of 100ns to 2µs is required to synchronize the
internal oscillator. If not used SYNC should be grounded.
I
LIM
(Pin 8): Current Limit Adjust Pin. Connect a resistor
from this pin to ground to set the peak current limit thresh-
old for the N-channel MOSFET according to the formula
(note that this is the peak current in the inductor):
I
R
LIM
=
150
where I is in amps and R is in k.
BURST (Pin 9): Burst Mode
Threshold Adjust Pin. A
resistor/capacitor combination from this pin to ground
programs the average load current at which automatic
Burst Mode operation is entered, according to the formula:
R
I
BURST
BURST
=
2
where R
BURST
is in k and I
BURST
is in amps.
C
CV
BURST
OUT OUT
,10 000
where C
BURST(MIN)
and C
OUT
are in µF.
For manual control of Burst Mode operation, ground the
BURST pin to force Burst Mode operation or connect it to
V
OUT
to force fixed frequency PWM mode. Note that the
BURST pin must not be pulled higher than V
OUT
.
GND (Pin 10): Signal Ground Pin. Connect to ground plane
near the R
T
resistor, error amp compensation compo-
nents and feedback divider.
PGND (Pins 11 to 13): Source Terminal of Power Internal
N-Channel MOSFET.
SW (Pins 14 to 16): Switch Pin for Inductor Connection.
For applications where V
OUT
> 4.3V, a Schottky diode from
SW to V
OUT
or to a snubber circuit is required to maintain
absolute maximum rating for SW. (see Application Cir-
cuits for 5V).
V
OUT
(Pins 17, 19 and 20): The output of the synchronous
rectifier and bootstrapped power source for the IC. A
ceramic bypass capacitor is required to be very close to
the V
OUT
and PGND pins of the IC.
V
OUTS
(Pin 18): V
OUT
Sense Pin. Connect V
OUTS
directly to
an output filter capacitor. The top of the feedback divider
network should also be tied to this point.
V
IN
(Pin 21): Input Supply Pin. Connect this pin to the
input supply and decouple with at least a 4.7µF ceramic
capacitor.
LBO (Pin 22): Open-Drain Output. This pin pulls low when
the LBI input is below 0.6V. The open-drain output can
sink up to 20mA. During Burst Mode operation LBO is only
active during the time the IC wakes up to service the
output.
LBI (Pin 23): Low-Battery Comparator Input. Typical
threshold voltage is 0.6V with 30mV hysteresis. This
function is enabled when the ENB pin is high. The low-
battery comparator will operate off V
IN
or V
OUT
, whichever
is greater.
V
C
(Pin 24): Error Amp Output. A frequency compensation
network is connected from this pin to ground to compen-
sate the loop. See the section Compensating the Feedback
Loop for guidelines.
Exposed Pad (Pin 25): Ground. This pin must be soldered
to the PCB and is typically connected through the power
GND plane.