Datasheet

LTC3417
13
3417fd
APPLICATIONS INFORMATION
Figure 2. Digital Soft-Start Out1
Soft-Start
Soft-start reduces surge currents from V
IN
by gradu-
ally increasing the peak inductor current. Power supply
sequencing can also be accomplished by controlling the
I
TH
pin. The LTC3417 has an internal digital soft-start for
each regulator output, which steps up a clamp on I
TH
over
1024 clock cycles, as can be seen in Figures 2 and 3. As
the voltage on I
TH
ramps through its operating range, the
internal peak current limit is also ramped at a proportional
linear rate.
Mode Selection
The MODE pin provides mode selection. Connecting this pin
to V
IN
enables Burst Mode operation for both regulators,
which provides the best low current effi ciency at the cost
of a higher output voltage ripple. When MODE is connected
to ground, pulse skipping operation is selected for both
regulators, which provides the lowest output voltage and
current ripple at the cost of low current effi ciency. Applying
a voltage that is more than 1V from either supply results
in forced continuous mode for both regulators, which
creates a fi xed output ripple and allows the sinking of
some current (about 1/2ΔI
L
). Since the switching noise is
constant in this mode, it is also the easiest to fi lter out. In
many cases, the output voltage can be simply connected
to the MODE pin, selecting the forced continuous mode
except at start-up.
Figure 3. Digital Soft-Start Out2
V
IN
= 3.6V
V
OUT
= 1.8V
R
L
= 0.9Ω
200µs/DIV
I
L
1A/DIV
V
OUT
1V/DIV
V
RUN
2V/DIV
V
IN
= 3.6V
V
OUT
= 2.5V
R
L
= 2Ω
200µs/DIV
I
L
0.5A/DIV
V
OUT
1V/DIV
V
RUN
2V/DIV
Checking Transient Response
The I
TH
pin compensation allows the transient response
to be optimized for a wide range of loads and output
capacitors. The availability of the I
TH
pin not only allows
optimization of the control loop behavior, but also pro-
vides a DC coupled and AC fi ltered closed-loop response
test point. The DC step, rise time, and settling at this test
point truly refl ects the closed-loop response. Assuming a
predominantly second order system, phase margin and/or
damping factor can be estimated using the percentage of
overshoot seen at this pin. The bandwidth can also be
estimated using the percentage of overshoot seen at this
pin or by examining the rise time at this pin.
The I
TH
external components shown in the Figure 4 circuit
will provide an adequate starting point for most applica-
tions. The series RC fi lter sets the dominant pole-zero
loop compensation. The values can be modifi ed slightly
(from 0.5 to 2 times their suggested values) to optimize
transient response once the fi nal PC layout is done and
the particular output capacitor type and value have been
determined. The output capacitors need to be selected
because of various types and values determine the loop
feedback factor gain and phase. An output current pulse
of 20% to 100% of full load current having a rise time
of 1µs to 10µs will produce output voltage and I
TH
pin
waveforms that will give a sense of overall loop stability
without breaking the feedback loop.