Datasheet

LTC3417A-2
18
3417a2fa
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3417A-2. These items are also illustrated graphically
in the layout diagram of Figure 5. Check the following in
your layout.
1
. Does the capacitor C
IN
connect to the power V
IN1
(Pin 2), V
IN2
(Pin 8), and PGND2/GNDD (Pin 17) as
close as possible (DFN package)? It may be necessary
to split C
IN
into two capacitors. This capacitor provides
the AC current to the internal power MOSFETs and
their drivers.
2. Are the C
OUT1
, L
1
and C
OUT2
, L
2
closely connected? The
(–) plate of C
OUT1
returns current to PGND1, and the
(–) plate of C
OUT2
returns current to the PGND2/GNDD
and the (–) plate of C
IN
.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of C
OUT1
and a ground line ter-
minated near GNDA. The resistor divider, R3 and R4,
must be connected between the (+) plate of C
OUT2
and
a ground line terminated near GNDA. The feedback
signals V
FB1
and V
FB2
should be routed away from noise
components and traces, such as the SW lines, and its
trace should be minimized.
4. Keep sensitive components away from the SW pins.
The input capacitor C
IN
, the compensation capacitors
C
C1
, C
C2
, C
ITH1
and C
ITH2
and all resistors R1, R2, R3,
R4, R
ITH1
and R
ITH2
should be routed away from the
SW traces and the inductors L1 and L2.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small
signal components returning to the GNDA pin at one
point which is then connected to the
PGND2/GNDD
pin.
6. Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
components. These copper areas should be connected
to one of the input supplies.
Figure 5. Layout Guideline
V
IN2
PGND2/
EXPOSED PAD
V
IN1
PGND1
SW1
V
FB1
I
TH1
FREQ
RUN1
SYNC/MODE
LTC3417A-2
GNDD
V
IN
V
IN
V
IN
C
IN
10µF
C
IN2
0.1µF
C
IN1
0.1µF
C
OUT2
V
OUT2
C
OUT1
V
OUT1
L2 L1
C
C2
C
C1
R3
R4
R
ITH2
C
ITH2
C
ITH1
R8
R1
R2
R
ITH1
R7
STAR TO
GNDA
STAR TO
GNDA
GNDA
SW2
V
FB2
I
TH2
POR
RUN2
PHASE
3417A-2 F05
APPLICATIONS INFORMATION