Datasheet

8
LTC3413
3413fb
APPLICATIO S I FOR ATIO
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The output ripple is highest at maximum input voltage
since ΔI
L
increases with input voltage. Multiple capacitors
placed in parallel may be needed to meet the ESR and RMS
current handling requirements. Dry tantalum, special poly-
mer, aluminum electrolytic and ceramic capacitors are all
available in surface mount packages. Special polymer
capacitors offer very low ESR but have lower capacitance
density than other types. Tantalum capacitors have the
highest capacitance density but it is important to only use
types that have been surge tested for use in switching
power supplies.
Aluminum electrolytic capacitors have significantly higher
ESR, but can be used in cost-sensitive applications pro-
vided that consideration is given to ripple current ratings
and long term reliability. Ceramic capacitors have excel-
lent low ESR characteristics but can have a high voltage
coefficient and audible piezoelectric effects. The high Q of
ceramic capacitors with trace inductance can also lead to
significant ringing.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
the power is supplied by a wall adapter through long wires,
a load step at the output can induce ringing at the input,
V
IN
. At best, this ringing can couple to the output and be
mistaken as loop instability. At worst, a sudden inrush of
current through the long wires can potentially cause a
voltage spike at V
IN
large enough to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
Table 1 shows some recommended surface mount
inductors for LTC3413 applications.
Table 1. Recommended Surface Mount Inductors
Value DCR
Manufacturer Part Number (μH) (mΩ)
Murata LQH55DNR47M01 0.47 13.0
Vishay/Dale IHLP2525CZPJR47M01 0.47 4.2
Pulse P1166.681T 0.44 6.0
Cooper SD20-R47 0.47 20.0
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the trapezoi-
dal wave current at the source of the top MOSFET. To
prevent large voltage transients from occurring, a low ESR
input capacitor sized for the maximum RMS current
should be used. The maximum RMS current is given by:
II
V
V
V
V
RMS OUT MAX
OUT
IN
IN
OUT
=
()
–1
This formula has a maximum at V
IN
= 2V
OUT
, where I
RMS
= I
OUT
/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate the
capacitor, or choose a capacitor rated at a higher tempera-
ture than required. Several capacitors may also be paral-
leled to meet size or height requirements in the design.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage
ripple and load step transients as well as the amount of
bulk capacitance that is necessary to ensure that the
control loop is stable. Loop stability can be checked by
viewing the load transient response as described in a later
section. The output ripple, ΔV
OUT
, is determined by:
Δ≤Δ +
⎛
⎝
⎜
⎞
⎠
⎟
V I ESR
fC
OUT L
OUT
1
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