Datasheet

LTC3413
11
3413fc
APPLICATIONS INFORMATION
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC3413 in dropout at an
input voltage of 3.3V, a load current of 3A and an ambi-
ent temperature of 70°C. From the Typical Performance
graph of switch resistance, the R
DS(ON)
of the P-channel
switch at 70°C is approximately 97mΩ. Therefore, power
dissipated by the part is:
P
D
= (I
LOAD
2
)(R
DS(ON)
) = (3A)
2
(97mΩ) = 0.87W
For the TSSOP package, the θ
JA
is 38°C/W. Thus the junc-
tion temperature of the regulator is:
T
J
= 70°C + (0.87W)(38°C/W) = 103°C
which is below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction temperature
is lower due to reduced switch resistance (R
DS(ON)
).
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to ΔI
LOAD
(ESR), where ESR is the effective series
resistance of C
OUT
. ΔI
LOAD
also begins to charge or dis-
charge C
OUT
generating a feedback error signal used by the
regulator to return V
OUT
to its steady-state value. During
this recovery time, V
OUT
can be monitored for overshoot
or ringing that would indicate a stability problem. The I
TH
pin external components and output capacitor shown in
Figure 1a will provide adequate compensation for most
applications.
Output Voltage Tracking of V
REF
For applications in which the V
REF
pin is connected to
the V
IN
pin, the output voltage will be equal to one-half
of the voltage on the V
IN
pin. Because the output voltage
will track the input voltage, any disturbance on V
IN
will
appear on V
OUT
. For example, a load step transient could
cause the input voltage to drop if there is insuffi cient bulk
capacitance at the V
IN
pin. The corresponding drop in the
output voltage during the load step transient is caused by
the V
OUT
tracking of V
IN
and should not be confused with
poor load regulation.
Design Example
As a design example, consider using the LTC3413 in an
application with the following specifi cations: V
IN
= 2.5V,
V
OUT
= 1.25V, I
OUT(MAX)
= ±3A, f = 1MHz.
First, calculate the timing resistor:
Rkk
OSC
=Ω=Ω
323 10
110
10 313
11
6
.•
•
–
Use a standard value of 309k. Next, calculate the inductor
value for about 40% ripple current:
L
V
MHz A
V
V
=
⎛
⎝
⎜
⎞
⎠
⎟
⎛
⎝
⎜
⎞
⎠
⎟
=
125
112
1
125
25
04
.
•.
–
.
.
.77μH
Using a 0.47μH inductor results in a maximum ripple
current of:
Δ=
μ
⎛
⎝
⎜
⎞
⎠
⎟
⎛
⎝
⎜
⎞
⎠
⎟
I
V
MHz H
V
V
L
125
1047
1
125
25
.
•.
–
.
.
== 133.A
C
OUT
will be selected based on the ESR that is required
to satisfy the output voltage ripple requirement and the
bulk capacitance needed for loop stability. For this design,
two 100μF ceramic capacitors will be used. C
IN
should be
sized for a maximum current rating of:
IA
V
V
V
V
A
RMS RMS
=
⎛
⎝
⎜
⎞
⎠
⎟
=3
125
25
25
125
115
.
.
.
.
–.
Decoupling the PV
IN
pins with two 100μF capacitors is
adequate for most applications. Connect the V
REF
pin
directly to SV
IN
. Connecting the V
FB
pin directly to V
OUT
will set the output voltage equal to one-half of the volt-
age on the V
REF
pin. The complete circuit for this design
example is illustrated in Figure 3.