Datasheet

LTC3412A
3
3412afe
electricAl chArActeristics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3412AE is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3412AI is guaranteed
to meet performance specifications over the –40°C to 125°C operating
junction temperature range. The LTC3412AMP is guaranteed and tested to
meet performance specifications over the full –55°C to 125°C operating
junction temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at T
A
≈ T
J
= 25°C. V
IN
= 3.3V unless otherwise specified.
Note 3: The LTC3412A is tested in a feedback loop that adjusts V
FB
to
achieve a specified error amplifier output voltage (I
TH
).
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: T
J
is calculated from the ambient temperature T
A
and power
dissipation as follows: LTC3412AFE: T
J
= T
A
+ P
D
(38°C/W)
LTC3412AUF: T
J
= T
A
+ P
D
(34°C/W)
Note 6: 4MHz operation is guaranteed by design and not production tested.
Note 7: Switch on resistance is guaranteed by design and test condition in
the UF package and by final test correlation in the FE package.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SV
IN
Signal Input Voltage Range 2.25 5.5 V
V
FB
Regulated Feedback Voltage (Note 3)
E-, I-Grades
MP-Grade
l
l
0.784
0.780
0.800
0.800
0.816
0.816
V
V
I
FB
Voltage Feedback Leakage Current 0.1 0.2 µA
∆V
FB
Reference Voltage Line Regulation V
IN
= 2.7V to 5.5V (Note 3)
l
0.04 0.2 %V
V
LOADREG
Output Voltage Load Regulation Measured in Servo Loop, V
ITH
= 0.36V
Measured in Servo Loop, V
ITH
= 0.84V
l
l
0.02
–0.02
0.2
–0.2
%
%
∆V
PGOOD
Power Good Range ±7.5 ±9 %
R
PGOOD
Power Good Pull-Down Resistance 120 200 Ω
I
Q
Input DC Bias Current
Active Current
Sleep
Shutdown
(Note 4)
V
FB
= 0.78V, V
ITH
= 1V
V
FB
= 1V, V
ITH
= 0V
V
RUN
= 0V, V
MODE
= 0V
250
64
0.02
330
80
1
µA
µA
µA
f
OSC
Switching Frequency
Switching Frequency Range
R
OSC
= 294kΩ
(Note 6)
0.88
0.3
1 1.1
4
MHz
MHz
f
SYNC
SYNC Capture Range (Note 6) 0.3 4 MHz
R
PFET
R
DS(ON)
of P-Channel FET I
SW
= 1A (Note 7) 77 110 mΩ
R
NFET
R
DS(ON)
of N-Channel FET I
SW
= –1A (Note 7) 65 90 mΩ
I
LIMIT
Peak Current Limit 4.5 6 A
V
UVLO
Undervoltage Lockout Threshold 1.75 2 2.25 V
I
LSW
SW Leakage Current V
RUN
= 0V, V
IN
= 5.5V 0.1 1 µA
V
RUN
RUN Threshold 0.5 0.65 0.8 V
I
RUN
RUN/SS Leakage Current 1 µA