Datasheet

LTC3411
15
sn3411 3411fs
current in these resistors should be kept small. Choosing
2µA with the 0.8V feedback voltage makes R1~400k. A
close standard 1% resistor is 412k and R2 is then 887k.
The compensation should be optimized for these compo-
nents by examining the load step response but a good
place to start for the LTC3411 is with a 13kΩ and 1000pF
filter. The output capacitor may need to be increased
depending on the actual undershoot during a load step.
The PGOOD pin is a common drain output and requires a
pull-up resistor. A 100k resistor is used for adequate
speed.
Figure 1 shows the complete schematic for this design
example.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3411. These items are also illustrated graphically in
the layout diagram of Figure 6. Check the following in your
layout:
1. Does the capacitor C
IN
connect to the power V
IN
(Pin 6)
and power GND (Pin 5) as close as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are the C
OUT
and L1 closely connected? The (–) plate of
C
OUT
returns current to PGND and the (–) plate of C
IN
.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of C
OUT
and a ground line terminated
near SGND (Pin 3). The feedback signal V
FB
should be
routed away from noisy components and traces, such as
the SW line (Pin 4), and its trace should be minimized.
4. Keep sensitive components away from the SW pin. The
input capacitor C
IN
, the compensation capacitor C
C
and
C
ITH
and all the resistors R1, R2, R
T
, and R
C
should be
routed away from the SW trace and the inductor L1.
5. A ground plane is preferred, but if not available, keep the
signal and power grounds segregated with small signal
components returning to the SGND pin at one point which
is then connected to the PGND pin.
6. Flood all unused areas on all layers with copper.
Flooding with copper will reduce the temperature rise of
power components. These copper areas should be con-
nected to one of the input supplies: PV
IN
, PGND, SV
IN
or
SGND.
APPLICATIO S I FOR ATIO
WUU
U
PV
IN
LTC3411
PGND
SW
SV
IN
SGND
PGOODPGOOD
V
FB
SYNC/MODE
I
TH
SHDN/R
T
L1
V
IN
BMPS
V
IN
V
OUT
R5
R
T
R3R1R2
3411 F06
C3
BOLD LINES INDICATE HIGH CURRENT PATHS
C
IN
C
OUT
C4
Figure 6. LTC3411 Layout Diagram (See Board Layout Checklist)