Datasheet

LTC3407-2
6
sn34072 34072fs
The LTC3407-2 uses a constant frequency, current mode
architecture. The operating frequency is set at 2.25MHz
and can be synchronized to an external oscillator. Both
channels share the same clock and run in-phase. To suit
a variety of applications, the selectable Mode pin allows
the user to choose between low noise and high efficiency.
The output voltage is set by an external divider returned to
the V
FB
pins. An error amplfier compares the divided
output voltage with a reference voltage of 0.6V and adjusts
the peak inductor current accordingly. Overvoltage and
undervoltage comparators will pull the POR output low if
the output voltage is not within ±8.5%. The POR output
will go high after 262,144 clock cycles (about 117ms) of
achieving regulation.
OPERATIO
U
BLOCK DIAGRA
W
1
2
9
10
8
3
4
11
5
–
+
–
+
–
+
–
+
EA
UVDET
OVDET
0.6V
7
0.65V
0.55V
–
+
0.35V
UV
OV
I
TH
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
S
R
Q
Q
RS
LATCH
BURST
–
+
I
COMP
I
RCMP
ANTI
SHOOT-
THRU
BURST
CLAMP
SLOPE
COMP
EN
SLEEP
POR
COUNTER
0.6V REF OSC
OSC
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
PGOOD1
PGOOD2
SHUTDOWN
V
IN
V
IN
V
IN
6
REGULATOR 1
SW1
GND
POR
GND
SW2
5Ω
MODE/SYNC
V
FB1
RUN1
RUN2
V
FB2
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the V
FB
voltage is below the the reference voltage.
The current into the inductor and the load increases until
the current limit is reached. The switch turns off and
energy stored in the inductor flows through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle.
The peak inductor current is controlled by the internally
compensated I
TH
voltage, which is the output of the error
amplifier.This amplifier compares the V
FB
pin to the 0.6V
reference. When the load current increases, the V
FB
volt-
age decreases slightly below the reference. This