Datasheet

11
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
APPLICATIO S I FOR ATIO
WUUU
Figure 4. LTC3405A-1.8 Layout Diagram
Figure 5. LTC3405A-1.8 Suggested Layout
RUN
LTC3405A-1.8
GND
SW
6
L1
BOLD LINES INDICATE HIGH CURRENT PATHS
V
IN
V
OUT
3405A1518 F04
4
5
1
3
+
–
2
MODE
V
OUT
V
IN
C
IN
C
OUT
LTC3405A-1.8
GND
3405A1518 F05
PIN 1
V
OUT
V
IN
SW
VIA TO V
IN
C
OUT
C
IN
L1
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3405A series parts. These items are also illustrated
graphically in Figures 4 and 5. Check the following in your
layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V
IN
trace should be kept short, direct and
wide.
2. Does the (+) plate of C
IN
connect to V
IN
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
3. Keep the (–) plates of C
IN
and C
OUT
as close as possible.
Design Example
As a design example, assume the LTC3405A-1.8 is used
in a single lithium-ion battery-powered cellular phone
application. The V
IN
will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.25A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
1.8V. With this information we can calculate L using
equation (1),
L
fI
V
V
V
L
OUT
OUT
IN
=
()
∆
()
−
⎛
⎝
⎜
⎞
⎠
⎟
1
1
(3)
Substituting V
OUT
= 1.8V, V
IN
= 4.2V, ∆I
L
= 100mA and
f = 1.5MHz in equation (3) gives:
L
V
MHz mA
V
V
H= −
⎛
⎝
⎜
⎞
⎠
⎟
≅ µ
18
1 5 100
1
18
42
68
.
.( )
.
.
.
For best efficiency choose a 300mA or greater inductor
with less than 0.3Ω series resistance.
C
IN
will require an RMS current rating of at least 0.125A ≅
I
LOAD(MAX)
/2 at temperature and C
OUT
will require an ESR
of less than 0.5Ω. In most cases, a tantalum capacitor will
satisfy this requirement.
Figure 6 shows the complete circuit along with its effi-
ciency curve.