Datasheet

11
LTC3401
3401fb
APPLICATIO S I FOR ATIO
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A logic level feed forward signal, V
FF
, is coupled through
components C5 and R6. The amount of feed forward
signal is attenuated with resistor R6 and is given by the
following relationship:
R
VRV
VI
R
FF IN
OUT OUT
6
515
5≈
⎛
⎝
⎜
⎞
⎠
⎟
•• •.
•
–
Δ
where ΔI
OUT
= load current change.
where C
OUT
is the output filter capacitor.
The output filter zero is given by:
f
RC
Hz
FILTERZERO
ESR OUT
=
1
2• • •π
where R
ESR
is the capacitor equivalent series resistance.
A troublesome feature of the boost regulator topology is
the right half plane zero (RHP) and is given by:
f
VR
LV
Hz
RHPZ
IN O
O
=
2
2
2
•
•••π
At heavy loads this gain increase with phase lag can occur
at a relatively low frequency. The loop gain is typically
rolled off before the RHP zero frequency.
The typical error amp compensation is shown in Figure 4.
The equations for the loop dynamics are as follows:
f
C
Hz
whichis extremelycloseto DC
f
RC
Hz
f
RC
Hz
POLE
C
ZERO
ZC
POLE
ZC
1
6
1
1
1
2
2
1
22010
1
2
1
2
≈
=
≈
•• • •
•• •
•• •
π
π
π
Closing the Feedback Loop
The LTC3401 uses current mode control with internal
adaptive slope compensation. Current mode control elimi-
nates the 2nd order filter due to the inductor and output
capacitor exhibited in voltage mode controllers, and sim-
plifies it to a single-pole filter response. The product of the
modulator control to output DC gain plus the error amp
open-loop gain equals the DC gain of the system.
G
DC
= G
CONTROLOUTPUT
• G
EA
G
V
I
CONTROL
IN
OUT
=
2•
, G
EA
≈ 2000
The output filter pole is given by:
f
I
VC
Hz
FILTERPOLE
OUT
OUT OUT
=
π ••
Figure 3
3
10
2
6
1
3404 F03
LTC3401
V
IN
SHDN
MODE/SYNC
PGOOD
R
t
SW
V
OUT
FB
V
C
GND
4
7
8
9
5
R5
C3
LOAD FEED
FORWARD
SIGNAL
V
FF
R6
C5
3.3nF
V
IN
V
OUT
Refer to Application Note AN-76 for more closed loop
examples.
Figure 4
–
+
1.25V
FB
ERROR
AMP
V
OUT
8
V
C
C
C1
C
C2
3401 F04
R
Z
R2
R1
9