Datasheet

LTC3375
16
3375fc
For more information www.linear.com/3375
operaTion
Buck Switching Regulators
The LTC3375 contains eight monolithic 1A synchronous
buck switching regulators. All of the switching regulators
are internally compensated and need only external feedback
resistors to set the output voltage. The switching regula
-
tors offer two operating modes: Burst Mode operation
(power
-up default mode) for higher efficiency at light
loads and for
ced continuous PWM mode for lower noise
at light loads. In Burst Mode operation at light loads, the
output capacitor is charged to a voltage slightly higher
than its regulation point. The regulator then goes into sleep
mode, during which time the output capacitor provides the
load current. In sleep most of the regulator’s circuitry is
powered down, helping conserve input power. When the
output capacitor droops below its programmed value, the
circuitry is powered on and another burst cycle begins.
The sleep time decreases as load current increases. In
Burst Mode operation, the regulator will burst at light
loads whereas at higher loads it will operate at constant
frequency PWM mode operation. In forced continuous
mode (selectable via I
2
C command), the oscillator runs
continuously and the buck switch currents are allowed
to reverse under very light load conditions to maintain
regulation. This mode allows the buck to run at a fixed
frequency with minimal output ripple.
Each buck switching regulator has its own V
IN
, SW, FB
and EN pin to maximize flexibility. The enable pins have
two different enable threshold voltages that depend on
the operating state of the LTC3375. With all regulators
disabled, the enable pin threshold is set to 730mV (typical).
Once any regulator is enabled, the enable pin thresholds
of the remaining regulators are set to a bandgap-based
400mV and the EN pins are each monitored by a precision
comparator. This precision EN threshold may be used to
provide event-based sequencing via feedback from other
previously enabled regulators. All buck regulators have
forward and reverse-current limiting, soft-start to limit
inrush current during start-up, and short-circuit protection.
Each buck can operate in standalone mode using the EN
pin in its default MODE and FB reference settings, or be
fully controlled using the I
2
C port. I
2
C commands may
be used to independently program each buck regulators’
operating mode, oscillator phase, and reference voltage in
addition to simple ON/OFF control. Each buck may have its
phase programmed in 90° phase steps via I
2
C. The phase
step command programs the fixed edge of the switching
sequence, which is when the PMOS turns on. The PMOS
off (NMOS on) phase is subject to the duty cycle demanded
by the regulator. Bucks 1 and 2 default to 0°, bucks 3 and4
default to 90°, bucks 5 and 6 default to 180°, and bucks7
and 8 default to 270°. Each buck can have its feedback
voltage independently programmed in 25mV increments
from 425mV to 800mV. All regulators’ feedback voltages
default to 725mV at initial power-up. In cases where power
stages are combined, the register content of the master
program the combined buck regulator’s behavior and the
register contents of the slave are ignored.
Two additional I
2
C commands act on all the buck switch-
ing regulators together. In shutdown, an I
2
C control bit
keeps all the SW nodes in a high impedance state (default)
or forces all the SW nodes to decay to GND through 1k
(typical) resistors. Also, the slew rate of the SW nodes
may be switched from the default value to a lower value
for reduced radiated EMI at the cost of a small drop in
efficiency.
Each buck regulator may be enabled via its enable pin or
I
2
C. The buck regulator enable pins may be tied to V
OUT
voltages, through a resistor divider, to program power-
up sequencing. If a different power-down sequence is
required, the enables can be redundantly written via I
2
C.
The EN pins can then be ignored via an I
2
C command,
and the switching regulators may be powered down via
I
2
C while the EN pins remain tied to the output voltages
of other regulators.
In addition to many programming options, there are also
17 bits of data that may be read back to report fault condi
-
tions on the LTC3375, and all I
2
C commands can be read
back prior to executing.
Buck Regulators with Combined Power Stages
Up to four adjacent buck regulators may be combined
in a master-slave configuration by connecting their SW
pins together, connecting their V
IN
pins together, and
connecting the higher numbered bucks’ FB pin(s) to the
input supply. The lowest numbered buck is always the
master. In Figure1, buck regulator 1 is the master. The