Datasheet

LTC3300-1
37
33001fb
For more information www.linear.com/LTC3300-1
APPLICATIONS INFORMATION
Figure 15. Stack Terminal Currents in Shutdown
+
+
16µA
V
–
C6
LTC3300-1
7.5µA
16µA
V
–
C6
LTC3300-1
7.5µA
16µA
V
–
33001 F15
C6
LTC3300-1
7.5µA
16µA
3
V
–
CELL N – 6
C6CELL N
LTC3300-1
TOP OF STACK
BOTTOM OF STACK
23.5µA
TOS = 1
+
+
CELL N – 12
CELL N – 7
7.5µA
7.5µA
23.5µA
0µA
0µA
+
+
+
CELL 7
CELL 6
CELL 12
+
CELL 1
3
3
3
ALL
ZERO
C5
C4
C3
C2
C1
ALL
ZERO
C5
C4
C3
C2
C1
ALL
ZERO
C5
C4
C3
C2
C1
ALL
ZERO
C5
C4
C3
C2
C1
Analysis of Stack Terminal Currents in Shutdown
As given in the Electrical Characteristics table, the qui-
escent current of the LTC3300-1 when not balancing is
16μA
at the C6
pin and zero at the C1 through C5 pins.
All of this 16μA shows up at the V
–
pin of the LTC3300-1.
In addition, the SPI port when not communicating (i.e.,
CSBI = 1) contributes an additional 2.5μA per high side
line (CSBO/SCKO/SDOI), or 7.5μA to the V
–
pin current
of each LTC3300-1 in the stack which is not top of stack
(TOS = 0). This additional current does not add to the local
C6 pin current but rather to the C6 pin current of the next
higher LTC3300-1 in the stack as it is passed in through
the CSBI/SCKI/SDI pins. To the extent that the 16μA and
7.5μA currents match perfectly chip-to-chip in a long series
stack, the resultant stack terminal currents in shutdown
are as follows: 23.5μA out of the top of stack node, 7.5μA
out of the node 6 cells below top of stack, 7.5μA into the
node 6 cells above bottom of stack, and 23.5μA into the
bottom of stack node. All other intermediate node cur
-
rents are zero. This is shown graphically in Figure 15. For
the specific case of a 12-cell stack, this reduces to only
23.5µA out of the top of stack node and 23.5µA into the
bottom of stack node.