Datasheet

LTC3261
9
3261fb
For more information www.linear.com/3261
applicaTions inForMaTion
should be consulted to ensure the desired capacitance at
all temperatures and voltages. Table 1 is a list of ceramic
capacitor manufacturers and their websites.
Table 1
AVX www.avxcorp.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay www.vishay.com
TDK www.component.tdk.com
Layout Considerations
Due to high switching frequency and high transient currents
produced by LTC3261, careful board layout is necessary
for optimum performance. A true ground plane and short
connections to all the external capacitors will improve
performance and ensure proper regulation under all condi-
tions. Figure 3 shows an example layout for the LTC3261.
The flying capacitor nodes C
+
and C
–
switch large currents
at a high frequency. These nodes should not be routed
close to sensitive pins such as the RT pin .
Thermal Management
At high input voltages and maximum output current, there
can be substantial power dissipation in the LTC3261. If
the junction temperature increases above approximately
175°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
ground plane is recommended. Connecting the exposed pad
of the package to a ground plane under the device on two
layers of the PC board can reduce the thermal resistance
of the package and PC board considerably.
Derating Power at High Temperatures
To prevent an overtemperature condition in high power
applications, Figure 4 should be used to determine the
maximum combination of ambient temperature and power
dissipation.
The power dissipated in the LTC3261 should always fall
under the line shown for a given ambient temperature.
The power dissipated in the LTC3261 is:
P
D
= (V
IN
– |V
OUT
|) • (I
OUT
)
where I
OUT
denotes output current at the V
OUT
pin.
The derating curve in Figure 4 assumes a maximum ther-
mal resistance, θ
JA
, of 40°C/W for the package. This can
be achieved with a four layer PCB that includes 2oz Cu
traces and six vias from the exposed pad of the LTC3261
to the ground plane.
It is recommended that the LTC3261 be operated in the re-
gion corresponding to T
J
≤ 150°C for continuous operation
as shown in Figure 4. Operation beyond 150°C should be
avoided as it may degrade part performance and liftetime.
At high temperatures, typically around 175°C, the part is
placed in thermal shutdown and the output is disabled.
When the part cools back down to a low enough tempera-
ture, typically around 165°C, the output is re-enabled and
the part resumes normal operation.
Figure 3. Recommended Layout
Figure 4. Maximum Power Dissipation vs Ambient Temperature
GND
GND
3261 F03
C
F LY
R
T
V
IN
V
OUT
EN
MODE
AMBIENT TEMPERATURE (°C)
–50
0
6
4
5
2
3
1
7550250 125100–25 175150
3261 F04
MAXIMUM POWER DISSIPATION (W)
θ
JA
= 40°C/W
RECOMMENDED
OPERATION
T
J
= 150°C