Datasheet

LTC3260
8
3260fa
block DiagraM
Note: Pin numbers are as per DFN package. Refer to the Pin Functions section for corresponding MSOP pin numbers.
9 10
13
14
–
+
–
+
1.2V
REF
INVERTING
CHARGE PUMP
–1.2V
REF
CHARGE
PUMP
AND
INPUT
LOGIC
50kHz
TO
500kHz
OSC
LDO
+
EN
+
V
IN
C
+
S1
S4
S3
ADJ
+
BYP
+
3
4
BYP
–
ADJ
–
5
15
LDO
–
GND
1
8
C
–
S2
7
RT
2
EN
–
11
MODE
12
V
OUT
6
operaTion
(Refer to the Block Diagram)
The LTC3260 is a high voltage low noise dual output
regulator. It includes an inverting charge pump and two
LDO regulators to generate bipolar low noise supply rails
from a single positive input. It supports a wide input power
supply range from 4.5V to 32V.
Shutdown Mode
In shutdown mode, all circuitry except the internal bias is
turned off. The LTC3260 is in shutdown when a logic low
is applied to both the enable inputs (EN
+
and EN
–
). The
LTC3260 only draws 2µA (typical) from the V
IN
supply
in shutdown.
Charge Pump Constant Frequency Operation
The LTC3260 provides low noise constant frequency op-
eration when a logic low is applied to the MODE pin. The
charge pump and oscillator circuit are enabled using the
EN
–
pin. At the beginning of a clock cycle, switches S1 and
S2 are closed. The external flying capacitor across the C
+
and C
–
pins is charged to the V
IN
supply. In the second
phase of the clock cycle, switches S1 and S2 are opened,
while switches S3 and S4 are closed. In this configuration
the C
+
side of the flying capacitor is grounded and charge
is delivered through the C
–
pin to V
OUT
. In steady state
the V
OUT
pin regulates at –V
IN
less any voltage drop due
to the load current on V
OUT
or LDO.