Datasheet

LTC3260
12
3260fa
applicaTions inForMaTion
also have a poor voltage coefficient causing them to lose
60% or more of their capacitance when the rated voltage
is applied. Therefore when comparing different capacitors,
it is often more appropriate to compare the amount of
achievable capacitance for a given case size rather than
discussing the specified capacitance value. The capacitor
manufacture’s data sheet should be consulted to ensure
the desired capacitance at all temperatures and voltages.
Table 1 is a list of ceramic capacitor manufacturers and
their websites.
Table 1
AVX www.avxcorp.com
Kemet www.kemet.com
Murata www.murata.com
Taiyo Yuden www.t-yuden.com
Vishay www.vishay.com
TDK www.component.tdk.com
Layout Considerations
Due to high switching frequency and high transient currents
produced by LTC3260, careful board layout is necessary
for optimum performance. A true ground plane and short
connections to all the external capacitors will improve
performance and ensure proper regulation under all condi-
tions. Figure 5 shows an example layout for the LTC3260.
The flying capacitor nodes C
+
and C
–
switch large cur-
rents at a high frequency. These nodes should not be
routed close to sensitive pins such as the LDO feedback
pins (ADJ
+
and ADJ
–
) and internal reference bypass pins
(BYP
+
and BYP
–
).
Thermal Management
At high input voltages and maximum output current, there
can be substantial power dissipation in the LTC3260. If
the junction temperature increases above approximately
175°C, the thermal shutdown circuitry will automatically
deactivate the output. To reduce the maximum junction
temperature, a good thermal connection to the PC board
ground plane is recommended. Connecting the exposed pad
of the package to a ground plane under the device on two
layers of the PC board can reduce the thermal
resistance
of the package and PC board considerably.
Derating Power at High T
emperatures
To prevent an overtemperature condition in high power
applications, Figure 6 should be used to determine the
maximum combination of ambient temperature and power
dissipation.
The power dissipated in the LTC3260 should always fall
under the line shown for a given ambient temperature. The
power dissipated in the LTC3260 has three components.
Power dissipated in the positive LDO:
P
LDO
+
= (V
IN
– V
LDO
+
) • I
LDO
+
Power dissipated in the negative LDO:
P
LDO
–
= (|V
OUT
| – |V
LDO
–
|) • I
LDO
–
and
Power dissipated in the inverting charge pump:
P
CP
= (V
IN
– |V
OUT
|) • (I
OUT
+ I
LDO
–
)
where I
OUT
denotes any additional current that might be
pulled directly from the V
OUT
pin. The LDO
–
current is
also supplied by the charge pump through V
OUT
and is
therefore included in the charge pump power dissipation.
The total power dissipation of the LTC3260 is given by:
P
D
= P
LDO
+
+ P
LDO
–
+ P
CP
Figure 5. Recommended Layout
V
OUT
V
IN
LDO
–
LDO
+
GND
3260 F05
C
BYP
+
C
F LY
GND
RT
C
BYP
–